DLL Duty Ratio Control With Dual Feedback After Locking
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Solution Overview
Problem
Existing DLL circuits face challenges in maintaining a correct duty ratio of output clocks due to changes in PVT, leading to inefficient power consumption and large area requirements, especially after the delay locking operation is completed.
Innovation Solution
The DLL circuit incorporates a duty ratio correction unit, detection unit, voltage comparison unit, and switching unit to selectively apply fine control signals to delay control units, ensuring continuous duty ratio correction through two feedback loops, even after delay locking is completed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a dual loop type DLL circuit with phase mixers is used to control duty ratio, then duty ratio adjustment is possible, but the area occupied by components becomes large and power consumption increases
Solution Approach 1:
The patent extracts and removes the phase mixer component from the DLL circuit. Instead of using a phase mixer with multiple drivers in pull-up and pull-down sections, the invention uses a simplified delay control unit that directly controls delay elements. This extraction eliminates the complex phase mixer structure, significantly reducing circuit area while maintaining duty ratio control capability through the duty ratio control unit that generates control signals based on feedback from the output clock.
Solution Approach 2:
The delay control unit serves multiple functions: it controls the delay elements for phase adjustment, maintains duty ratio through feedback control, and operates in both delay locking and duty ratio maintenance modes. This multi-functionality replaces the need for separate phase mixer circuits, reducing overall circuit area while achieving both phase and duty ratio control in a unified structure.
2Manufacturing precision
If a dual loop type DLL circuit with phase mixers is used to control duty ratio, then duty ratio adjustment is possible, but power consumption becomes high
Solution Approach 1:
By removing the phase mixer component with its multiple drivers, the patent eliminates a major source of power consumption. The simplified delay control unit requires fewer active elements and generates control signals more efficiently, leading to reduced power consumption while maintaining duty ratio control functionality through the feedback mechanism.
Solution Approach 2:
The DLL circuit uses feedback from the output clock signal to automatically adjust and maintain the duty ratio. The duty ratio control unit monitors the output clock and self-adjusts the control signals to delay elements, eliminating the need for complex external control circuits and reducing overall power consumption through autonomous operation.
3Device complexity
If only one feedback loop is activated after delay locking, then circuit operation is simplified, but the output clock does not have a correct duty ratio due to PVT changes
Solution Approach 1:
The patent implements a dynamic feedback mechanism where the duty ratio control unit continuously monitors the output clock and adjusts control signals in real-time. This dynamic adjustment compensates for PVT changes and maintains accurate duty ratio without requiring complex static circuit design. The system transitions from a static single-loop operation to a dynamic dual-loop operation that adapts to changing conditions.
Solution Approach 2:
The invention uses feedback from the output clock signal to the duty ratio control unit, which then generates adjusted control signals for the delay elements. This feedback mechanism enables continuous duty ratio correction despite PVT variations, maintaining precision without requiring overly complex circuit architecture. The feedback loop automatically compensates for drift and ensures accurate duty ratio maintenance.
Data Source
AI summary
A DLL circuit includes a duty ratio correction unit that corrects the duty ratios of first and second delay clocks duty ratio to generate first and second correction clocks. A duty ratio detection unit detects the duty ratios of the first and second correction clocks, thereby generating first and second detection signals. A voltage comparison unit compares the levels of the first and second detection signals, thereby generating a first fine control signal. An operation mode setting unit generates a locking completion signal and a second fine control signal. A switching unit selectively transmits the first fine control signal or the second fine control signal to a delay control unit according to whether or not the locking completion signal is enabled.