Clock Tracking Lock Detection Using Digital Phase Discrimination

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Solution Overview

Problem

Existing clock-tracking circuits face challenges in accurately determining a locked status due to imprecise or inaccurate methods, particularly when using analog control signals that require significant real estate and do not directly include phase error information.

Innovation Solution

A locked status detector for clock-tracking circuits that utilizes a phase detector with a settable phase threshold and a digital discriminator to distinguish between steady-state and transitory phase errors, enabling precise determination of locked status based on the phase difference between reference and feedback clocks.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If analog control signals are used to determine locked status, then the determination can be made, but the method requires significant real estate and provides imprecise or inaccurate results

Engineering Contradiction:
Improvelocked status determination accuracyVSAvoidcircuit real estate
Core Design Contradiction:
Measurement precisionVSArea of stationary object

Solution Approach 1:

The patent replaces analog control signal-based locked status determination with a digital method that uses phase detector status signals. This substitution eliminates the need for analog circuitry that consumes significant real estate while providing more precise and accurate locked status determination through digital phase error analysis.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Loss of information

If analog control signals are used to determine locked status, then the determination can be made, but the method does not directly include phase error information

Engineering Contradiction:
Improvephase error informationVSAvoidlocked status determination reliability
Core Design Contradiction:
Loss of informationVSReliability

Solution Approach 1:

The patent implements a feedback mechanism where the phase detector continuously monitors the phase difference between reference and feedback clocks and generates status signals that directly reflect phase error information. This feedback loop ensures that locked status determination is based on accurate, real-time phase error data rather than indirect analog control signals.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent introduces a digital discriminator as an intermediary component that processes the phase detector's status signal. This discriminator analyzes the phase error information and determines locked status based on predefined thresholds, ensuring that the determination directly incorporates phase error information while maintaining system reliability.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Measurement precision

If digital discrimination of phase errors is implemented, then steady-state and transitory errors can be distinguished, but the device complexity increases

Engineering Contradiction:
Improvephase error detection accuracyVSAvoidcircuit structure complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent segments the phase error detection process into distinct functional components: a phase detector that generates status signals, a digital discriminator that analyzes these signals, and logic that determines locked status. This segmentation allows for precise differentiation between steady-state and transitory phase errors while organizing the complexity into manageable, modular units.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS12494789B2Determining a locked status of a clock tracking circuit
Publication Date: 2025.12.09 MICROCHIP TECHNOLOGY INC
  • US12494789B2 patent drawing
  • US12494789B2 patent drawing
  • US12494789B2 patent drawing

AI summary

An example apparatus includes a phase detector, a digital discriminator, and a logic circuit. A status signal of the phase detector is at least partially based on a phase relationship between a reference clock and a feedback clock, the feedback clock generated by a clock tracking circuit to track the reference clock. The digital discriminator may sample the status signal of the phase detector. The logic circuit may determine a locked status of the clock tracking circuit at least partially based on samples of the status signal of the phase detector.