Clock Edge Tracking for Sub-Cycle System Synchronization
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Solution Overview
Problem
Conventional synchronization methods for systems operating on independent time bases achieve only one clock cycle accuracy, leading to indeterministic inaccuracy due to unknown phase shifts and indeterministic delays, which cannot be compensated by fixed values.
Innovation Solution
Implement a logger module and configurable delay module to record counter values at double data rate, analyze edge regions, and adjust the counter offset and delay to achieve synchronization accuracy of less than one clock cycle by determining the optimal offset and delay based on recorded counter values.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional synchronization methods are used, then the system is simple to implement, but the synchronization accuracy is limited to one clock cycle
Solution Approach 1:
The patent segments the synchronization process into multiple independent modules: a logger module for recording counter values, a configurable delay module for timing adjustment, and a control circuit for coordinate transformation. This modular segmentation allows each component to perform its specific function with high precision, achieving sub-clock-cycle synchronization accuracy while maintaining manageable system complexity through clear functional separation.
Solution Approach 2:
The patent introduces a new dimensional approach by recording counter values at double data rate (both rising and falling edges of the clock signal), effectively adding a temporal dimension to the synchronization measurement. This dual-rate sampling in the time domain enables the system to measure and compensate for phase shifts with precision greater than one clock cycle, transforming the synchronization problem from a single-point measurement to a multi-point temporal analysis.
2Measurement precision
If fixed offset values are used for synchronization, then the system is easy to operate, but indeterministic delays cannot be compensated
Solution Approach 1:
The patent replaces fixed synchronization offset values with dynamic, adjustable parameters. The configurable delay module allows the delay value to be modified based on measured phase shifts, and the control circuit dynamically calculates coordinate transformations to determine optimal offset values. This dynamic approach enables the system to adapt to varying timing conditions and compensate for indeterministic delays, achieving high synchronization accuracy while maintaining ease of operation through automated adjustment.
Solution Approach 2:
The patent implements a feedback mechanism where the logger module continuously records counter values from both systems, the control circuit analyzes these values to determine phase shifts and calculate coordinate transformations, and the configurable delay module adjusts timing parameters based on this analysis. This closed-loop feedback system automatically compensates for timing variations and indeterministic delays, achieving high synchronization accuracy without requiring manual calibration while maintaining ease of operation.
Data Source
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AI summary
An apparatus (20) and method for synchronizing a triggered system (System B) to a triggering system (System A) by tracking the timing of rising and falling edges of a clock signal (CLK_IN) at the triggered system and using the tracked timing values (within logger 27 from counter 22) for phase shift adjustment (25: SET) of a time base (CLK_IN at 28 out) at the triggered systems.