Clock Recovery Control for Noise-Disrupted Digital Reception
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Solution Overview
Problem
Conventional clock data recovery systems require a long time to recover original data and clock after temporary noise superimposition on digital signals, due to noise-induced frequency and phase deviations.
Innovation Solution
A reception apparatus with a voltage-controlled oscillator, sampler unit, control voltage generation unit, and error detection unit that stops phase/frequency comparison and equalizer control when errors are detected, allowing the system to quickly recover original data and clock by using a training pattern for immediate frequency synchronization.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If feedback control is performed to recover clock and data from digital signal, then clock and data can be recovered, but a long time period is required after noise superimposition stops
Solution Approach 1:
The patent applies preliminary action by detecting noise superimposition early through error detection units (41, 42) and proactively stopping the phase/frequency comparison operation before the feedback control can be significantly disrupted. This early intervention prevents the system from entering a prolonged recovery state, thereby reducing the time required to regain accurate clock and data recovery after noise cessation.
2Productivity
If phase/frequency comparison continues during noise superimposition, then feedback control operates continuously, but recovered clock frequency/phase deviates significantly from original
Solution Approach 1:
The patent extracts the phase/frequency comparison operation from the continuous feedback control loop during noise superimposition periods. By selectively stopping the comparison operation when errors are detected (through units 41, 42), the system removes the harmful influence of noise on clock recovery while maintaining the overall feedback control structure for normal operation, thus preventing significant frequency/phase deviation.
3Stability of the object's composition
If feedback control adjusts clock to match noisy signal, then clock follows signal, but recovered data differs from original value
Solution Approach 1:
The patent converts the harmful effect of noise-induced synchronization into a beneficial detection opportunity. By monitoring for errors (through units 41, 42) that arise during noise superimposition, the system identifies when the signal-clock synchronization has been corrupted and stops the phase/frequency comparison operation accordingly. This transforms the harmful synchronization error into a useful trigger for protective action, preventing data recovery errors.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly shortens the time required to recover original data and clock after noise removal, improving transmission characteristics by reducing state transitions and error detection times.
Implementation Method 1
a voltage-controlled oscillator configured to input a control voltage and output a clock of a frequency according to a value of the control voltage
Data Source
AI summary
Provided is a reception apparatus capable of shortening a time period until the original data and clock can be recovered from a digital signal after temporary superimposition of noise on the digital signal stops. A reception apparatus 20 includes a receiver unit 21, a voltage-controlled oscillator 22, a sampler unit 23, a control voltage generation unit 24, an error detection unit 25, a training control unit 26, and an equalizer control unit 27. The receiver unit 21 includes an equalizer unit 21A. When the error detection unit 25 detects an error of a digital signal, the reception apparatus 20 causes a phase/frequency comparison by the control voltage generation unit 24 to be stopped.