Multi-Stage Level Shifter for Voltage Margin and Low Leakage
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Solution Overview
Problem
Conventional level shifters for mobile electronic devices have insufficient voltage margin and high power consumption due to leakage currents, which limits their effectiveness in shifting voltage levels efficiently.
Innovation Solution
A level shifter design incorporating a cross-coupling structure with six PMOS and six NMOS transistors, which generates multiple voltage levels to facilitate efficient signal shifting between different power voltages, reducing leakage currents and increasing integration density.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional level shifters are used in mobile electronic devices, then voltage level shifting is achieved, but power consumption increases due to leakage currents and voltage margin becomes insufficient
Solution Approach 1:
The level shifter is divided into multiple stages: a first level shifter stage that shifts from a first voltage level to a second voltage level, and a second level shifter stage that shifts from the second voltage level to a third voltage level. This segmentation allows each stage to operate with optimized transistor sizes and reduces leakage currents compared to a single-stage design, thereby improving voltage margin while controlling power consumption.
Solution Approach 2:
Different transistor sizes are used in different stages of the level shifter. Specifically, the first level shifter uses transistors with a first size, while the second level shifter uses transistors with a second size. This parameter change optimizes the voltage margin and leakage current characteristics for each stage, resolving the contradiction between sufficient voltage margin and low power consumption.
2Reliability
If multi-stage level shifting is implemented, then voltage margin is improved, but device complexity increases
Solution Approach 1:
The first and second level shifter stages are integrated into a single unified circuit structure with shared power supply connections and coordinated transistor operation. This merging approach achieves multi-stage voltage shifting functionality while minimizing the increase in device complexity compared to separate independent level shifters.
Data Source
AI summary
A level shifter includes a first input circuit, a first load circuit, a second input circuit, and a second load circuit. The first input circuit receives a first input signal and a second input signal that swing between a first high power voltage and a first low power voltage. The first load circuit generates a high voltage, a sub-high voltage, a low voltage, and a sub-low voltage. The second input circuit receives a first voltage pair including the high voltage and the low voltage, and a second voltage pair including the sub-high voltage and the sub-low voltage. The second load circuit generates an output signal that swings between a second high power voltage and a second low power voltage.