Clocked Level Shifter With Precharge for Low Duty Error
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Solution Overview
Problem
Conventional level shifters face issues with duty error and increased power consumption due to through-current and leakage current, especially when dealing with large voltage differences and insufficient current sinking capability, leading to inefficient signal transmission.
Innovation Solution
A level shifter design that incorporates a level shifting unit, precharging units, and leakage current prevention units, operating based on a clock signal to change swing voltage levels and prevent current leakage, thereby reducing duty error and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If a conventional level shifter with cross-coupled latch scheme is used, then signal level shifting from VDD1 to VDD2 is achieved, but through-current and current-fighting occur leading to increased power consumption
Solution Approach 1:
The patent extracts and removes the problematic through-current path from the conventional level shifter circuit by replacing the cross-coupled latch scheme with a transmission gate-based architecture that prevents direct current flow between VDD2 and VSS, thereby eliminating current-fighting while maintaining reliable signal transmission
Solution Approach 2:
The patent introduces transmission gates as intermediary elements that control and mediate the signal transmission between different voltage domains, allowing level shifting to occur without creating direct current paths that cause power consumption issues
2Adaptability or versatility
If the voltage difference between VDD1 and VDD2 is large, then level shifting capability is improved, but current sinking capability becomes insufficient leading to duty error
Solution Approach 1:
The patent applies preliminary action by pre-charging the output node to VDD2 through the precharge transistor before the actual signal transition, ensuring that the output node is ready to quickly respond to input changes even when large voltage differences exist between VDD1 and VDD2, thereby maintaining duty cycle accuracy
Solution Approach 2:
The patent introduces dynamic control through clocked transmission gates and precharge transistors that adaptively adjust their conductivity based on the clock signal phase, enabling the circuit to dynamically handle large voltage differences while maintaining precise duty cycle control
3Ease of operation
If precharging is performed without clock signal control, then output node preparation is improved, but leakage current increases
Solution Approach 1:
The patent implements periodic action by using the clock signal to periodically enable and disable the precharge transistor, allowing the output node to be precharged only when needed (during specific clock phases) and preventing continuous precharge that would cause leakage current during other operational phases
Data Source
AI summary
A level shifter includes a level shifting unit suitable for changing a swing voltage level of an input signal from a first swing voltage level to a second swing voltage level based on a clock signal, a precharging unit suitable for precharging an output node of the level shifting unit based on the clock signal, and an output unit suitable for latching a signal of the output node having the second swing voltage level to output as an output signal.