Clock Signal Sampling for SSC Modulation Parameter Estimation

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Solution Overview

Problem

Existing methods for estimating the parameters of Spread Spectrum Clocking (SSC) modulation in electronic circuits are complex, costly, and not feasible for industrial-scale testing, making it difficult to determine if the implemented SSC method corresponds to the expected method.

Innovation Solution

A method and device for estimating SSC modulation parameters by sampling a periodic signal, tracking synchronization occurrences, and using counters and shift registers to determine modulation period and ratio, with minimal modifications to the electronic circuit, allowing for cost-effective and fast implementation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If dedicated complex tools are used to estimate SSC parameters, then measurement precision is improved, but device complexity and cost increase

Engineering Contradiction:
ImproveSSC parameter estimation accuracyVSAvoidtesting tool complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent creates a virtual model of the SSC modulation process by sampling the clock signal with a reference signal and processing the sampling results through counters and logic circuits. This virtual copying approach eliminates the need for complex physical measurement tools while maintaining parameter estimation accuracy

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The patent replaces complex physical measurement instruments with electronic signal processing methods. By using digital sampling, counting, and logical operations on sampled signals, the system substitutes expensive dedicated tools with standard electronic components, reducing both cost and complexity

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Measurement precision

If dedicated complex tools are used to estimate SSC parameters, then measurement precision is improved, but loss of time increases

Engineering Contradiction:
ImproveSSC parameter estimation accuracyVSAvoidtesting duration
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent enables continuous parameter estimation by continuously sampling the clock signal and continuously processing the sampling results. This continuous operation eliminates the time-consuming setup and execution cycles of traditional batch processing methods, allowing rapid and repeated measurements

Inventive Principle:
Principle #20Continuity of useful action

Solution Approach 2:

The patent performs preliminary sampling of the clock signal at defined sampling points before actual parameter calculation. This pre-processing of signal data prepares the information in advance, enabling faster computation of modulation period and ratio when needed, thus reducing overall testing time

Inventive Principle:
Principle #10Preliminary action

3Ease of operation

If SSC modulation parameters are not accurately estimated, then ease of operation is improved, but reliability decreases

Engineering Contradiction:
Improvecircuit operation simplicityVSAvoidSSC implementation correctness
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The patent implements feedback by comparing the estimated SSC parameters (modulation period and ratio) against expected or specified values. This feedback mechanism allows automatic verification of whether the SSC modulation is correctly implemented, ensuring reliability without complicating the operation of the circuit itself

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS8995496B2Method and device for estimating parameters of a system for spreading the spectrum of a clock signal
Publication Date: 2015.03.31 STMICROELECTRONICS (GRENOBLE 2) SAS
  • US8995496B2 patent drawing
  • US8995496B2 patent drawing
  • US8995496B2 patent drawing

AI summary

A method to estimate parameters of a system to spread a spectrum of a first periodic signal according to a modulation period. An embodiment comprises sampling the first signal using a second periodic signal, determining based on the sampling result each occurrence where the first and second signals are synchronous, incrementing a first counter at each sampling, the first counter being reset at each said occurrence, storing at each said occurrence the last value of the first counter before the resetting, providing a third periodic signal at a first level when said last value is greater than a threshold and at a second level when said last value is smaller than the threshold, and determining the modulation period based on the period of the third signal.