Intermittent DCO PLL Control for Low-Power Imaging ICs
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Solution Overview
Problem
Existing semiconductor integrated circuits face challenges in reducing power consumption without complicating the configuration of oscillation control, particularly in phase locked loop (PLL) circuits, due to issues with open mode operation and leakage in analog circuits.
Innovation Solution
A semiconductor integrated circuit design that includes an oscillator with discretely adjustable frequency, an oscillation controller, and an intermittent controller to intermittently update the digital control input signal, utilizing digital control signals and synchronization with sensor outputs to reduce power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the PLL loop is always operated to maintain frequency control, then frequency stability is improved, but power consumption increases
Solution Approach 1:
The patent implements intermittent operation of the PLL loop by using an intermittent control signal that periodically activates the oscillation controller. Instead of continuous operation, the PLL loop is activated only at specific intervals to update the digital control input signal to the DCO, while remaining in open mode between updates. This periodic action maintains frequency stability when needed while significantly reducing average power consumption.
2Use of energy by moving object
If the PLL loop is opened to reduce power consumption, then power consumption is reduced, but frequency control capability deteriorates
Solution Approach 1:
The patent dynamically switches the PLL loop between open mode and closed mode based on operational requirements. The intermittent control signal enables the system to transition from continuous closed-loop operation to intermittent closed-loop updates with open-mode operation in between. This dynamic approach allows the system to maintain frequency control capability when updates occur while enjoying the power savings of open mode during intervals.
Solution Approach 2:
The oscillation controller holds the digital control input signal that was most recently updated during PLL loop operation. By preliminarily updating the control signal during intermittent closed-loop periods and then maintaining it during open-mode periods, the system ensures frequency control capability is preserved without requiring continuous active control.
3Measurement precision
If an analog circuit is used for the PLL circuit, then frequency control precision is improved, but leakage occurs preventing complete open mode operation
Solution Approach 1:
The patent replaces the traditional analog PLL circuit with a digitally controlled oscillator (DCO) and digital oscillation controller. This substitution eliminates the leakage issues inherent in analog circuits, allowing for complete open mode operation when power reduction is needed. The digital implementation maintains sufficient frequency control precision through discrete frequency adjustment while enabling true intermittent operation without leakage preventing complete shutdown.
Data Source
AI summary
Provided are a semiconductor integrated circuit and an imaging device capable of reducing power consumption without complicating a configuration of oscillation control.A semiconductor integrated circuit includes an oscillator that generates an oscillation signal whose oscillation frequency is discretely adjustable on the basis of a digital control input signal, an oscillation controller that generates the digital control input signal, and an intermittent controller that generates an intermittent control signal and supplies the intermittent control signal to the oscillation controller so that the oscillation controller intermittently updates the digital control input signal.