Heterogeneous Clock IC Calibration for Accurate Low-Power Timing
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Solution Overview
Problem
Existing clock integrated circuits face challenges in generating accurate clock signals while minimizing the number of crystal oscillators, which are large and consume high power, and require a more compact and low-power solution for both high and low frequency bands.
Innovation Solution
A clock integrated circuit that includes a crystal oscillator for high-frequency signals and an RC oscillator with a frequency divider and calibration circuit for low-frequency signals, allowing for adjustable frequency division ratios based on temperature and calibration operations to achieve precise clock signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a crystal oscillator is used to generate a clock signal of a high frequency band, then the clock signal has good characteristics against noise, but the design area and power consumption increase
Solution Approach 1:
The patent segments the clock signal generation function into two parts: a crystal oscillator for generating a high-frequency reference clock signal with good noise characteristics, and an RC oscillator for generating a low-frequency clock signal. This segmentation allows each oscillator to be optimized for its specific frequency band, reducing the need for multiple crystal oscillators and thereby lowering overall power consumption while maintaining noise resistance where needed.
Solution Approach 2:
The patent changes the oscillator type parameter based on frequency band requirements. For high-frequency bands where noise resistance is critical, a crystal oscillator is used. For low-frequency bands where power consumption is more critical, an RC oscillator is used. This parameter change strategy allows the system to achieve good noise characteristics when needed while reducing power consumption in other operational modes.
2Reliability
If a crystal oscillator is used to generate a clock signal of a low frequency band, then the clock signal has good characteristics against noise, but the design area increases
Solution Approach 1:
The patent segments the clock signal generation function into two parts: a crystal oscillator for generating a high-frequency reference clock signal with good noise characteristics, and an RC oscillator for generating a low-frequency clock signal. This segmentation allows each oscillator to be optimized for its specific frequency band, reducing the need for multiple crystal oscillators and thereby lowering overall power consumption while maintaining noise resistance where needed.
Solution Approach 2:
The patent changes the oscillator type parameter based on frequency band requirements. For high-frequency bands where noise resistance is critical, a crystal oscillator is used. For low-frequency bands where power consumption is more critical, an RC oscillator is used. This parameter change strategy allows the system to achieve good noise characteristics when needed while reducing power consumption in other operational modes.
3Measurement precision
If multiple crystal oscillators are used to generate both high and low frequency clock signals, then accurate clock signals are achieved, but the number of crystal oscillators increases leading to higher power consumption and larger area
Solution Approach 1:
The patent segments the clock signal generation function into two parts: a crystal oscillator for generating a high-frequency reference clock signal with good noise characteristics, and an RC oscillator for generating a low-frequency clock signal. This segmentation allows each oscillator to be optimized for its specific frequency band, reducing the need for multiple crystal oscillators and thereby lowering overall power consumption while maintaining noise resistance where needed.
Solution Approach 2:
The patent makes the RC oscillator perform multiple functions: it generates the low-frequency clock signal directly and also serves as a frequency divider for the high-frequency clock signal from the crystal oscillator. This multi-functionality reduces the need for separate components, decreasing the number of crystal oscillators required while maintaining clock signal accuracy through the calibration circuit.
4Use of energy by moving object
If an RC oscillator is used to generate a low frequency clock signal, then the design area and power consumption are reduced, but the frequency accuracy decreases
Solution Approach 1:
The patent introduces a feedback mechanism through the calibration circuit that adjusts the frequency division ratio of the RC oscillator based on temperature sensing and comparison with the reference clock signal from the crystal oscillator. This feedback loop compensates for the inherent frequency drift of the RC oscillator, maintaining frequency accuracy while allowing the use of the lower-power RC oscillator for low-frequency clock signal generation.
Solution Approach 2:
The patent performs preliminary calibration of the RC oscillator during manufacturing or initialization, storing calibration data that is later used to adjust the frequency division ratio. This preliminary action prepares the RC oscillator to operate with improved frequency accuracy without requiring continuous high-power consumption, as the calibration data is stored and applied as needed.
Data Source
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AI summary
A clock integrated circuit (100) is provided. The clock integrated circuit includes: a first clock generator (110) which includes a crystal oscillator (XTAL) configured to generate a first clock signal (fxo); and a second clock generator (120) which includes a resistance-capacitance (RC) oscillator (121) and a first frequency divider (122), and is configured to: generate a second clock signal (fRTC)using the first frequency divider (122) based on a clock signal (fRCO) output from the RC oscillator (121); perform a first calibration operation for adjusting a frequency division ratio of the first frequency divider (122) to a first frequency division ratio based on the first clock signal (fxo) ; and perform a second calibration operation for adjusting the first frequency division ratio to a second frequency division ratio based on a sensed temperature.