Ring Oscillator Edge Synchronization for Wide-Range DVFS Clocks
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Solution Overview
Problem
Ring oscillators in integrated circuits face challenges in providing a synchronized output across different voltage ranges due to their unique transfer characteristics, which affects their suitability for both transistor-dominated and wire-dominated paths, limiting frequency scaling in dynamic voltage frequency scaling (DVFS) applications.
Innovation Solution
A circuit and method that utilize multiple ring oscillators with different characteristics, coupled with a selection unit, to synchronize clock edges and provide a seamless crossover point for sensitivity across various voltage ranges, ensuring synchronized operation and independent operation based on enable and selection signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple ring oscillators with different transfer characteristics are used to cover wide voltage ranges, then frequency scaling capability is improved, but synchronization difficulty increases
Solution Approach 1:
The selection unit is configured to receive periodic signals from multiple ring oscillators and selectively convey clock edges to synchronize them. By preliminarily selecting and coordinating the clock edges from oscillators with different transfer characteristics, the system achieves synchronized operation across wide voltage ranges while maintaining frequency scaling capability.
Solution Approach 2:
The selection unit acts as an intermediary between multiple ring oscillators with different transfer characteristics. It receives periodic signals from each oscillator, processes them according to synchronization requirements, and generates coordinated clock edges that ensure synchronized operation while preserving the frequency scaling benefits of having multiple oscillators with different characteristics.
2Measurement precision
If ring oscillators are selected to match specific clock load characteristics, then operating frequency linearity is improved, but adaptability to different voltage ranges deteriorates
Solution Approach 1:
The clock generation system is segmented into multiple ring oscillators, each optimized for specific voltage ranges and load characteristics. By dividing the overall clock generation function across multiple specialized oscillators and using a selection unit to coordinate them, the system achieves both operating frequency linearity for specific loads and adaptability across wide voltage ranges.
Solution Approach 2:
The system dynamically selects and coordinates clock edges from multiple ring oscillators based on operating conditions. The selection unit adapts its behavior to maintain synchronization while allowing each oscillator to operate in its optimal voltage range, thereby preserving both frequency linearity and voltage range adaptability.
Data Source
AI summary
A circuit for producing a synchronized output of multiple ring oscillators is disclosed. In one embodiment, the circuit includes a first ring oscillator configured to generate a first periodic signal and a second ring oscillator configured to generate a second periodic signal. The circuit may further include a selection unit coupled to receive the first periodic signal and the second periodic signal. The selection unit is configured to convey a first clock edge into each of the first and second ring oscillators responsive to a most recently received rising edge from one of the first and second periodic signals. The selection unit is further configured to convey a second clock edge into each of the first and second ring oscillators responsive to a most recently received falling edge from one of the first and second periodic signals, wherein the first and second clock edges are opposite in direction.