Static Precharge Level Shifter for Faster Power-Domain Signals
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Solution Overview
Problem
Conventional level shifters introduce undesirable delays in signal paths across power domains in integrated circuits due to their operation, which can disrupt proper communication of information between different voltage levels.
Innovation Solution
A level shifter design incorporating a static precharge circuit that operates in two phases - precharge and evaluate - using transistors and a capacitor to quickly respond to signal changes, with transistor sizing and capacitor feedback to minimize delay, allowing for efficient voltage level shifting across power domains.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If conventional level shifters are used to shift voltage levels across power domains, then voltage level shifting is achieved, but signal delay increases
Solution Approach 1:
The patent applies preliminary action by precharging the internal nodes to the target voltage level before the actual signal evaluation. This precharging phase, controlled by the clock signal, prepares the circuit in advance so that when the evaluate phase begins, the nodes are already at the correct voltage, eliminating the need for slow charging during signal transition and thus reducing overall signal delay
Solution Approach 2:
The patent implements periodic action through its two-phase clocked operation (precharge phase and evaluate phase). The clock signal periodically switches between phases, with the precharge phase resetting the nodes to a known state and the evaluate phase allowing signal propagation. This periodic resetting and evaluation rhythm ensures consistent timing and reduces variable delays associated with arbitrary signal arrival times
2Productivity
If conventional level shifters are used, then voltage level shifting is achieved, but setup time increases
Solution Approach 1:
The precharge phase performs preliminary action by establishing the target voltage level on internal nodes before the data signal needs to be evaluated. This advance preparation eliminates the need for long setup times, as the circuit is already primed and ready to quickly respond to incoming signals during the evaluate phase, thereby improving communication efficiency
Solution Approach 2:
The patent uses feedback through the clock signal that controls both the precharge and evaluate phases. The clock signal provides timing feedback that coordinates the precharging activity with the incoming signal arrival, ensuring that nodes are precharged optimally before evaluation begins. This feedback mechanism synchronizes the circuit operation to minimize setup time while maintaining reliable signal transmission
Data Source
AI summary
A level shifter includes a static precharge circuit. During a precharge phase, two nodes of the level shifter are precharged to a voltage at or near a reference voltage. During an evaluate phase, the level shifter maintains one of the nodes at the precharge voltage, while the other node is pulled to a different voltage level, such as at or near a ground voltage level, wherein the node that is maintained is selected based on the state of data input signals of the level shifter. The voltage at the nodes determines the state of the level shifter output signals, such that the output signals represent the input signals at a shifted voltage level. The level shifter can include a capacitor to feed forward a signal that causes the precharging to terminate more quickly.