Linear Phase Interpolator Circuit With Supply Noise Rejection
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Solution Overview
Problem
Phase interpolators in integrated circuits are prone to signal distortions due to power supply noise, which degrades performance and can be mitigated by using Low Dropout (LDO) power supply regulators but at the cost of reduced power efficiency.
Innovation Solution
A phase interpolator circuit with a capacitance circuit, switched resistor network, and interpolation management circuitry that uses passive resistors and a multi-stage charge/discharge process to generate an interpolated output signal, enhancing immunity to power supply noise without regulating the power supply input.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If an LDO power supply regulator is used to mitigate power supply noise, then supply noise rejection is improved, but power efficiency deteriorates
Solution Approach 1:
The patent extracts and removes the LDO regulator from the phase interpolator circuit, eliminating the power efficiency penalty. Instead, it uses a separate noise mitigation mechanism (capacitor with supply noise rejection circuitry) that selectively filters power supply noise without requiring voltage regulation, thus maintaining high power efficiency while still rejecting supply noise.
Solution Approach 2:
The patent segments the noise mitigation function from the voltage regulation function. By using a dedicated capacitor and supply noise rejection circuitry separate from the main power supply path, it addresses power supply noise without interfering with the primary power delivery, achieving noise rejection without the overhead of full LDO regulation.
2Use of energy by moving object
If a capacitor is coupled to the power supply terminal without regulation, then power efficiency is maintained, but supply noise rejection deteriorates
Solution Approach 1:
The patent introduces an intermediary supply noise rejection circuitry between the power supply terminal and the capacitor. This intermediary component (such as a noise filter or isolation circuit) allows the capacitor to maintain power efficiency while the intermediary blocks or attenuates power supply noise from reaching sensitive circuit nodes, thus achieving both goals simultaneously.
3Measurement precision
If switched resistor network uses configurable resistance, then interpolation precision is improved, but resistance mismatch increases
Solution Approach 1:
The patent employs parameter changes by using switched resistor networks where the resistance value is dynamically adjusted based on interpolation code rather than relying on precise fixed resistance values. This allows the system to achieve high interpolation precision through controlled parameter variation while being tolerant of manufacturing variations in the actual resistor values.
Solution Approach 2:
The patent transitions from static fixed resistors to dynamic switched resistors. The configurable resistance is achieved through switching networks that select different resistance paths based on control signals, enabling precise interpolation ratios to be programmed dynamically. This dynamic approach compensates for manufacturing mismatches by allowing post-fabrication calibration and adaptive adjustment.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution provides improved supply noise rejection and low resistance mismatch while maintaining high bandwidth, without the need for high power consumption linear supply voltage regulators.
Implementation Method 1
a capacitance circuit, a switched resistor network having a configurable resistance
Implementation Method 2
a switched resistor network having a configurable resistance... to charge or discharge the capacitance circuit through the switched resistor network
Data Source
AI summary
A phase interpolator circuit includes a capacitance circuit, a switched resistor network, and interpolation management circuitry. The resistor network receives a start-phase signal and an end-phase signal, and generates an interpolated output signal from a voltage on the capacitance circuit. The interpolation management circuitry receives an interpolation code defining an intermediate phase between the start-phase signal and the end-phase signal, charges or discharges the capacitance circuit through the resistor network, and controls the resistor network to set a phase of the interpolated output signal to be the intermediate phase. The interpolation management circuitry also (i) responsively to a transition in the start-phase signal, sets the resistance of the resistor network based on the interpolation code, and (ii) responsively to a voltage level on the capacitance circuit, sets the resistance of the resistor network to a constant resistance, and flows through the capacitance circuit an additional boosting current.