PLL Frequency Setting Circuit With Reduced Table Memory
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Solution Overview
Problem
Conventional PLL frequency setting circuits require large memory capacity due to the need for extensive tables to store frequency dividing values for various combinations of basic frequencies and transmission/reception modes, leading to increased circuit size.
Innovation Solution
The proposed solution reduces the size of the PLL frequency setting circuit by utilizing a table that stores quotients and remainders calculated by dividing the channel number by a specific integer, with an adding unit and selecting unit that generate the frequency set value based on regular patterns in the correspondence between channel numbers and frequency set values, thereby reducing the volume of data stored.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If separate tables are provided for each combination of basic frequencies and transmission/reception modes, then the frequency setting circuit can accurately provide frequency dividing values for all modes, but the memory capacity and circuit size increase significantly
Solution Approach 1:
The patent applies universality by designing a single table structure that serves multiple frequency setting modes (transmission/reception and different basic frequencies). Instead of creating separate tables for each mode combination, the same table is reused across all modes by adjusting the initial value of the intermediate bits and selecting appropriate lower-order bit patterns, thereby reducing memory capacity while maintaining full functional coverage.
Solution Approach 2:
The patent changes parameters (initial values of intermediate bits and lower-order bit patterns) to adapt the single table to different frequency setting modes. By modifying these bit parameters based on the current mode (transmission/reception, basic frequency A/B), the circuit achieves mode-specific frequency division without requiring separate tables for each mode combination.
2Adaptability or versatility
If a large capacity memory is used to store all frequency dividing values for every mode combination, then all frequency settings can be stored, but the circuit size increases
Solution Approach 1:
The patent makes the frequency setting table universal by designing it to handle all transmission/reception modes and basic frequency combinations through parameter adjustment rather than separate tables. The table structure remains the same, but the initial values and selected bit patterns change based on the operating mode, reducing the overall circuit size while maintaining comprehensive frequency coverage.
Solution Approach 2:
The patent segments the frequency dividing value into three parts: higher-order bits (from table), intermediate bits (added to table output), and lower-order bits (selected based on table output). This segmentation allows the table to store only essential frequency information while other parts are generated through addition and selection operations, reducing memory requirements and circuit size.
Data Source
AI summary
A frequency setting circuit includes a table storing, in an address corresponding to a channel number, a quotient and a remainder calculated by subtracting 1 from the channel number to calculate a difference and dividing the difference by 3 are stored in bits b7 to b3 and bits b1 to b0, respectively. When the channel number is designated by a channel setting unit, a value of the bits b1 to b0 is decoded and given to a selector as a selection signal. A frequency set value of twelve bits of lower-order four digits is selected and output from the selector.