DLL Update Cycle Control for External Clock Phase Shifts
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Solution Overview
Problem
Conventional DLL circuits fail to compensate for phase shifts in external clock signals when the shifts occur beyond the predetermined cycle of their phase correction operations, leading to incomplete phase correction.
Innovation Solution
A DLL circuit with a variable delay unit, delay model, phase detection unit, and update cycle control unit that generates a feedback clock signal and adjusts the update cycle based on phase detection results, enabling continuous phase correction by varying the delay time and determining cycle shifts.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the DLL circuit performs phase correction operation in a predetermined cycle, then the circuit operation is simple and stable, but the phase correction fails when the phase shift occurs beyond the predetermined cycle
Solution Approach 1:
The update cycle control unit dynamically adjusts the update cycle of the phase correction operation based on the detected cycle shift. When a cycle shift is detected, the update cycle is shortened to perform phase correction more frequently, ensuring reliable phase compensation even when large phase shifts occur. This dynamic adjustment resolves the contradiction by making the system adaptive rather than fixed.
Solution Approach 2:
The update cycle control unit continuously monitors the phase relationship between the external clock signal and the delay control signal to detect cycle shifts. This feedback mechanism triggers adjustments to the update cycle, enabling the system to respond to phase shifts and maintain reliable phase correction. The feedback loop ensures that the phase correction reliability is maintained without requiring overly complex circuitry.
2Measurement precision
If the update cycle is shortened to improve phase correction responsiveness, then the phase correction performance improves, but the power consumption and operation complexity increase
Solution Approach 1:
The system dynamically adjusts the update cycle based on actual phase shift conditions rather than operating at a fixed short cycle. The update cycle is extended under normal conditions to reduce power consumption, and only shortened when cycle shifts are detected and phase correction is needed. This dynamic approach achieves high measurement precision when required while minimizing power consumption during normal operation.
Solution Approach 2:
The update cycle parameter is changed adaptively based on the detected phase shift conditions. When no cycle shift is detected, a longer update cycle is used to conserve energy. When a cycle shift is detected, the update cycle parameter is changed to a shorter value to improve phase detection precision and correction effectiveness. This parameter change strategy resolves the contradiction between precision and power consumption.
Data Source
AI summary
A delay-locked loop (DLL) circuit having improved phase correction performance includes a variable delay unit configured to generate a DLL clock signal by delaying an input clock signal by a varied delay time in response to a delay control signal at timing corresponding to an update cycle signal, a delay model configured to generate a feedback clock signal by delaying the DLL clock signal for a predetermined delay time, a phase detection unit configured to output a result of the detection of the phase of the feedback clock signal based on a reference clock signal as the delay control signal, and an update cycle control unit configured to determine whether a cycle has been shifted or not in response to an external clock signal and the delay control signal and shift a cycle where the update cycle signal is generated based on a result of the determination.