PLL Charge Pump Slope Adjustment for Lower Deterministic Jitter
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Solution Overview
Problem
Phase locked loops (PLLs) in high-speed serializer-deserializer and optical link transceivers face challenges in reducing jitter, particularly due to deterministic jitter from the charge pump coupled with the voltage controlled oscillator (VCO).
Innovation Solution
The implementation of a phase locked loop (PLL) with a signal slope adjustment circuit that includes two charge pumps, a phase frequency detector (PFD), a voltage controlled oscillator (VCO), and a frequency divider, where the PFD adjusts the side slopes of the control signals based on feedback from a comparator to fine-tune the VCO output frequency, reducing jitter through improved control of the voltage control signal.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a charge pump is used to control the VCO in a PLL, then the PLL can achieve frequency locking and basic control functionality, but deterministic jitter is introduced that degrades signal quality
Solution Approach 1:
The charge pump is divided into two separate charge pumps: a first charge pump for coarse frequency adjustment and a second charge pump for fine frequency adjustment. This segmentation allows each charge pump to operate with optimized parameters, reducing the deterministic jitter introduced by a single charge pump while maintaining frequency locking capability.
Solution Approach 2:
The system dynamically switches between coarse and fine adjustment modes based on the locking status. When the PLL achieves frequency lock, the system transitions from coarse adjustment (first charge pump) to fine adjustment (second charge pump), optimizing performance and minimizing jitter in the locked state.
2Measurement precision
If the VCO frequency is adjusted to match the reference frequency, then frequency locking is achieved, but jitter from the charge pump remains a limiting factor
Solution Approach 1:
Frequency adjustment is segmented into coarse tuning (first charge pump) and fine tuning (second charge pump). The fine-tuning charge pump operates with smaller current steps, enabling more precise frequency matching while introducing less jitter compared to using a single charge pump with fine granularity throughout.
Solution Approach 2:
The system changes the operating parameters of the charge pump by switching between two different charge pumps with different current characteristics. The first charge pump uses larger current steps for rapid acquisition, while the second charge pump uses smaller current steps for precise frequency matching with reduced jitter.
3Device complexity
If a single charge pump is used for VCO control, then the circuit complexity is reduced, but the ability to reduce jitter is compromised
Solution Approach 1:
The charge pump control is segmented into two functional units: a first charge pump for acquisition and coarse tuning, and a second charge pump for fine tuning and jitter reduction. This segmentation increases circuit complexity slightly but provides significant jitter reduction benefits that outweigh the added complexity.
Solution Approach 2:
The system dynamically selects which charge pump to use based on the PLL locking status. During acquisition, the first charge pump is active; after locking is detected, the system switches to the second charge pump for fine adjustment. This dynamic operation manages complexity by not having both charge pumps active simultaneously.
Data Source
AI summary
A phase locked loop (PLL) includes a voltage controlled oscillator (VCO) configured to supply an output signal. A phase frequency detector (PFD) is configured to receive a reference frequency signal and to provide a first control signal. A first charge pump is configured to receive the first control signal and to provide a first voltage signal in order to control the VCO. A second charge pump is configured to receive the first control signal and to provide a second voltage signal. A comparator is configured to receive a reference voltage signal, to compare the reference voltage signal and the second voltage signal, and to provide a second control signal. The PFD is configured to adjust at least one side slope of the first control signal based on the second control signal.