Clock Arbitration Circuit for Detecting Time Source Desynchronization
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Solution Overview
Problem
Existing time base systems in electronic devices and computer networks suffer from synchronization issues due to drift caused by environmental factors, which can lead to malfunctions and security risks, especially in critical applications like air traffic control and banking transactions.
Innovation Solution
A time arbitration circuit with a comparator and clock signal generator that compares synchronization status between multiple clock signal sources, enabling or disabling the output clock signal based on synchronization data to ensure a secure and reliable clock signal, using internal and external synchronization sources to detect malfunctions or malevolent actions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a single clock signal source is used, then the device complexity is reduced, but the reliability of the clock signal deteriorates due to undetected drift or malfunctions
Solution Approach 1:
The patent segments the clock signal source into multiple independent sources (first clock signal source and second clock signal source), each capable of providing a clock signal. This segmentation allows the system to compare multiple sources and detect drift or malfunctions, thereby improving reliability while managing complexity through modular design.
Solution Approach 2:
The patent introduces a comparator as an intermediary component that receives clock signals from multiple sources and determines their synchronization status. This intermediary enables the system to objectively assess the reliability of each clock source and make informed decisions about which signal to use, resolving the contradiction between reliability and complexity.
2Reliability
If multiple clock signal sources are compared, then the synchronization status can be detected to improve security, but the device complexity increases due to additional circuit components
Solution Approach 1:
The patent implements preliminary comparison of clock signals from multiple sources before selecting which signal to output. The comparator continuously assesses synchronization status in advance, and the control circuit pre-determines which clock source is reliable, preventing desynchronized signals from being propagated. This preliminary action ensures security while managing complexity through proactive rather than reactive control.
Solution Approach 2:
The patent establishes a feedback loop where the comparator continuously monitors the synchronization status of clock signals and provides this information to the control circuit, which adjusts the selection of clock sources accordingly. This feedback mechanism enables real-time detection of drift or malfunctions and automatic switching to reliable sources, improving time synchronization security while using standardized feedback control components.
3Reliability
If continuous monitoring of synchronization status is implemented, then malevolent actions can be detected to improve security, but the use of energy increases due to continuous operation of comparator and control circuit
Solution Approach 1:
The patent implements periodic comparison and monitoring of clock signal synchronization status rather than truly continuous monitoring. The comparator and control circuit operate in cycles, assessing synchronization at regular intervals and adjusting clock source selection accordingly. This periodic action maintains security by detecting malevolent actions and drift while significantly reducing energy consumption compared to continuous operation.
Data Source
AI summary
A time arbitration circuit includes: a comparator including at least first and second inputs and configured to provide at least a first data item relative to the synchronization status of the signals present on the first and second inputs; a clock signal generator connected to an output terminal of the time arbitration circuit and delivering an output clock signal; a control circuit configured to enable or disable delivery of the output clock signal on the output terminal according to the first data item from the comparator and to possibly deliver data relative to the synchronization status according to the first data item; the first and second inputs of the comparator are connected to first and second input terminals of the time arbitration circuit designed to be connected to first and second sources delivering first and second clock signals.