Oscillator Frequency Calibration Using Divider Count Comparison
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Solution Overview
Problem
Conventional oscillators calibrate frequencies in the analog domain, limiting the ability to efficiently adjust oscillating frequencies in a digital context.
Innovation Solution
A circuit comprising an oscillator, a frequency divider, and a comparator that generates a divided signal and compares counts of the divided signal and a reference signal to adjust the oscillating frequency digitally, using a capacitor array or current source array to fine-tune the frequency based on the comparison result.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If conventional analog domain calibration is used for oscillator frequency adjustment, then the oscillator can generate oscillating signals, but the ability to efficiently adjust oscillating frequencies in a digital context is limited
Solution Approach 1:
The patent replaces the conventional analog domain calibration mechanism with a digital domain calibration system. The frequency adjustment is achieved through digital counting and comparison operations rather than analog circuit adjustments, enabling efficient digital context frequency adaptation while maintaining oscillator functionality
Solution Approach 2:
The patent introduces a frequency divider as an intermediary component between the oscillator and the digital processing system. This divider converts the high-frequency oscillating signal into a divided signal that can be accurately counted and compared by digital circuits, bridging the gap between analog oscillation and digital control
2Adaptability or versatility
If frequency adjustment range is expanded beyond predetermined parameters, then more frequency options are available, but frequency accuracy within predetermined parameters deteriorates
Solution Approach 1:
The patent segments the frequency adjustment process into two distinct stages: a coarse adjustment stage that covers a wide frequency range using the frequency divider and counter, and a fine adjustment stage that achieves high precision within predetermined parameters using the capacitor array. This segmentation allows both broad adaptability and high accuracy to coexist
Solution Approach 2:
The patent applies different adjustment mechanisms to different frequency ranges. The capacitor array provides fine-tuned local adjustment capability within predetermined frequency parameters, while the frequency divider enables broader range adjustment. Each mechanism is optimized for its specific operating range, ensuring high accuracy where needed and broad coverage where required
Data Source
AI summary
A circuit comprises an oscillator, a frequency divider and a comparator. The oscillator generates an oscillating signal (Fvco). The frequency divider is communicatively coupled to the oscillator, divides a frequency of the oscillating signal by a denominator and generates a divided signal. The comparator is communicatively coupled to the oscillator and the frequency divider, and is configured to obtain a first count of the divided signal (Fvco/N) within a predetermined time and a second count of a reference signal within the predetermined time; compare the first count with the second count, and generate a comparison result according to the first count and the second count. The oscillator is further configured to adjust the frequency of the oscillating signal according to the comparison result.