Subsampling Motion Detection Using Injection-Locked Phase Sensing
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Solution Overview
Problem
Existing motion detectors using phase lock loops (PLLs) face high power consumption due to the need for frequency dividers or fast phase detection, which is inefficient in terms of energy usage.
Innovation Solution
A subsampling motion detector that employs a controllable oscillator and a subsampling phase detector (SSPD) or subsampling analog-to-digital converter (SSADC) to detect motion information by locking the oscillation signal to a multiple or fractional multiple of a reference frequency, reducing the need for frequency dividers and minimizing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a frequency divider is used to divide the high frequency oscillation signal before phase detection, then the phase detection can be performed at a lower frequency, but the power consumption increases significantly
Solution Approach 1:
The patent extracts and eliminates the frequency divider component from the traditional PLL architecture. By using a subsampling phase detector that directly compares the high frequency oscillation signal with a low frequency reference signal without prior frequency division, the invention removes the power-consuming frequency divider while maintaining the ability to detect phase differences at lower effective frequencies through subsampling techniques.
Solution Approach 2:
Instead of the conventional approach of dividing the high frequency signal before comparison, the invention inverts the approach by using a subsampling phase detector that can directly compare high frequency signals with low frequency references. The subsampling technique allows the phase detector to operate at low frequency while still accurately measuring the phase of the high frequency signal, effectively reversing the traditional signal processing sequence.
2Device complexity
If a high frequency reference signal is provided for comparison with the high frequency oscillation signal, then frequency division is avoided, but the phase detector must operate at fast rates leading to increased power consumption
Solution Approach 1:
The invention removes the need for high frequency reference signals and complex high-speed phase detection circuits. By introducing a subsampling phase detector, the system can use a low frequency reference signal to detect the phase of high frequency oscillations, eliminating the requirement for fast-operating phase detectors and high frequency reference generators.
Solution Approach 2:
The invention changes the operating parameters of the phase detector by using subsampling techniques. Instead of requiring the phase detector to operate at high frequencies, the subsampling approach allows it to operate at low frequencies while still accurately measuring phase differences. This parameter change from high-frequency operation to low-frequency subsampling operation significantly reduces power consumption.
3Reliability
If traditional PLLs are used for motion detection, then stable high frequency oscillation is achieved, but power consumption is high due to frequency dividers or fast phase detection requirements
Solution Approach 1:
The invention extracts and removes the power-consuming components (frequency dividers and high-speed phase detection circuits) from the PLL system while maintaining the core functionality of oscillation stabilization. The subsampling phase detector provides a new architecture that achieves reliable phase locking without the need for traditional high-power components.
Solution Approach 2:
The invention changes the operational parameters of the PLL system by implementing subsampling phase detection. This allows the system to maintain stable oscillation locking while operating the phase detector at low frequencies, thereby significantly reducing power consumption while preserving the reliability and stability of the oscillation control.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The subsampling motion detector effectively reduces power consumption while maintaining accurate motion detection by using less power than traditional PLLs, with the ability to isolate Doppler shifts from environmental interference, thereby enhancing energy efficiency and detection precision.
Implementation Method 1
a controllable oscillator outputting an oscillation signal, wherein the first wireless RF signal is injected to the controllable oscillator for controlling the controllable oscillator through injecting locking
Implementation Method 2
a subsampling phase detector (SSPD) generating a control signal according to the oscillation signal generated by the controllable oscillator and a reference frequency
Implementation Method 3
a motion detector detecting the status of displacement of an object by the Doppler Effect requires a high frequency signal output from an oscillation source
Data Source
AI summary
A subsampling motion detector used to detect motion information of an object under measurement receives a first wireless radio frequency (RF) signal and transmits a second wireless RF signal, the first wireless RF signal being generated by reflecting the second wireless RF signal from the object. The subsampling motion detector has a high frequency oscillator for outputting a high frequency oscillation signal, a low frequency controllable oscillator for generating a low frequency oscillation signal according to a control signal, and a subsampling analog-to-digital converter (SSADC). The SSADC detects a phase difference between the high frequency oscillation signal and the low frequency oscillation signal at time periods indicated by the low frequency oscillation signal. The SSADC outputs a phase detection digital output signal according to the detected phase difference. The control signal is generated and the motion information of the object is calculated according to the phase detection digital output signal.


