Multiphase Clock Calibration in Memory Devices for Phase Error Equalization
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Solution Overview
Problem
Phase errors in multiphase clocks within memory devices lead to reduced performance and difficulty in detecting and correcting these errors, especially when testing multiple devices simultaneously, which increases test time and affects data signal quality.
Innovation Solution
A semiconductor device with an internal circuit that includes a multiphase clock generator, phase error detector, and control logic to detect and correct phase errors by adjusting the phases of clock signals using a control code set, ensuring uniform phase intervals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If phase error detection and correction is performed externally, then measurement precision may be improved, but test time increases significantly when testing multiple devices simultaneously
Solution Approach 1:
The patent implements self-service by integrating phase error detection and correction functionality directly within the memory device. The phase error detector and control logic are built into the device itself, enabling it to autonomously monitor and correct phase errors in its own multiphase clock signals without requiring external testing equipment or procedures. This self-diagnosis and self-correction capability dramatically reduces test time when multiple devices are tested simultaneously, as each device independently manages its own phase synchronization.
2Loss of time
If phase error detection is performed internally, then test time is reduced, but device complexity increases
Solution Approach 1:
The patent applies merging by integrating the phase error detection and correction functions with the existing multiphase clock generator and data strobe modules within the memory device. The phase error detector utilizes the same multiphase clock signals already present in the device, and the control logic is combined with the existing data writing control logic. This consolidation approach minimizes additional circuitry while achieving autonomous phase error correction, thereby limiting the increase in device complexity.
3Productivity
If multiple devices are tested simultaneously, then productivity increases, but accurate phase error detection becomes more difficult
Solution Approach 1:
By implementing self-service phase error detection and correction within each memory device, the system enables multiple devices to be tested and calibrated simultaneously without interfering with each other's measurements. Each device independently monitors its own phase errors and applies corrections autonomously, eliminating the need for sequential external testing. This approach maintains high measurement precision even when numerous devices are processed in parallel, thereby supporting increased productivity.
Data Source
AI summary
A semiconductor device includes a multiphase clock generator generating clock signals by dividing a data clock signal, adjusting phases of the clock signals based on a control code set to generate a multiphase clock, a first data strobe module generating first and second serial signals from first and second data sequences using the multiphase clock, a phase error detector comparing a first length of a first rising period of the first serial signal and a second length of a second rising period of the second serial signal to generate a comparison result, a register storing the comparison result, and a control logic determining code values of the control code set by referring to the comparison result so that phase intervals between the clock signals are equalized with each other, and correcting a phase of the multiphase clock by storing the code values of the control code set in the register.