DC Offset Correction Circuit for Low-Frequency Signal Preservation
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Solution Overview
Problem
Conventional DC offset correction methods, such as high pass filters and dynamic offset cancellation, either attenuate low frequency components or require system constraints, leading to information loss and distortion in signals, particularly in applications like Optical Time Domain Reflectometry where low frequency information is crucial.
Innovation Solution
A DC offset correction circuit that uses a calibration phase to charge capacitors to an average voltage level, then bypasses resistances during a signal processing phase, allowing both high and low frequency components to pass while blocking DC components, using a novel configuration of resistances and capacitors in series and parallel.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional high pass filter is used for DC offset correction, then DC offset is removed from the signal, but low frequency components are attenuated causing information loss
Solution Approach 1:
The circuit dynamically switches between two operational modes: during calibration phase, the capacitor charges to track the average input voltage including DC offset; during signal processing phase, the capacitor blocks DC offset while passing AC components. This dynamic switching resolves the contradiction by adapting the circuit's DC blocking behavior to different operational requirements.
Solution Approach 2:
The capacitor is pre-charged to the average input voltage during a calibration phase before signal processing begins. This preliminary action establishes the correct voltage reference on the capacitor, enabling it to subsequently block DC offset without affecting low frequency signal components during the signal processing phase.
2Reliability
If dynamic offset cancellation is used, then DC offset is corrected, but the input signal must be stopped during sampling phase placing constraints on system design
Solution Approach 1:
The input signal continues to flow through the circuit during the calibration phase without being stopped or isolated. The capacitor charges continuously from the input signal while it passes through to the output, maintaining continuous useful action and eliminating the need to stop the signal for offset sampling.
3Reliability
If dynamic offset cancellation is used, then DC offset is sampled, but low frequency components cannot be included in the sampling
Solution Approach 1:
The capacitor is pre-charged to the average input voltage during a calibration phase before signal processing begins. This preliminary action establishes the correct voltage reference on the capacitor, enabling it to subsequently block DC offset without affecting low frequency signal components during the signal processing phase.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively supports low frequency components without attenuation or distortion, enabling accurate reproduction of input signals and overcoming the limitations of prior art methods, particularly in applications requiring full dynamic range and low frequency information.
Implementation Method 1
a first capacitor selectively coupled in series to the first resistance responsive to a calibration enable signal
Implementation Method 2
The high pass filter circuitry may be described as performing an 'AC coupling' function in that the output from the high pass filter circuitry should include any time changing signal components that are present in the input signals, the 'AC' signals, while removing the DC voltage components
Data Source
AI summary
DC offset correction is provided with low frequency support. A first input terminal for receiving an input signal is selectively coupled to a resistance and a capacitor that are series coupled between the first input terminal and a corresponding output terminal. In a calibration phase, the series resistance is coupled between the input terminal and the capacitor and an average voltage level of the input is stored on capacitor. In a signal processing phase, the charged capacitor is coupled in series between the input terminal and the output terminal while the resistance is bypassed. The output signal obtained contains the high and low frequency components of the input signal, while the DC offset in the input signal is removed from the output signal. A differential circuit and methods are disclosed. Additional embodiments are disclosed.