PLL Phase Alignment Using Common-Reference Feedback
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Solution Overview
Problem
Existing methods for phase-aligning multiple synthesizers, such as phase-locked loops, suffer from poor initial accuracy and drift over time due to errors, and traditional synchronization methods like using circuitry for power consumption and noise issues.
Innovation Solution
A synthesizer system comprising multiple synthesizer circuits with a common reference signal, phase measurement circuits to determine phase differences, and synchronization circuits to adjust operations based on these measurements, allowing for in-phase operation without communication between synthesizers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional synchronization circuitry is used to synchronize synthesizer outputs, then phase alignment can be achieved, but power consumption increases and noise is introduced
Solution Approach 1:
The patent extracts the synchronization function from traditional heavy circuitry and implements it through software-based phase measurement and adjustment algorithms, eliminating the need for complex hardware synchronization circuits and thereby reducing power consumption while maintaining phase alignment accuracy
Solution Approach 2:
The patent replaces mechanical/electrical synchronization circuitry with a software-based system that uses phase measurement circuits and digital signal processing to achieve synchronization, substituting physical hardware with computational methods to reduce power consumption and noise
2Reliability
If traditional synchronization circuitry is used to synchronize synthesizer outputs, then phase alignment can be achieved, but noise is introduced
Solution Approach 1:
The patent extracts the synchronization function from noisy hardware circuitry and implements it through software-based phase measurement and adjustment, eliminating the noise-generating components while preserving the phase alignment capability
Solution Approach 2:
The patent replaces electrical synchronization circuitry that generates noise with a software-based digital system that processes phase information computationally, substituting analog hardware with digital methods to eliminate noise introduction
3Ease of operation
If synthesizers are started or reset simultaneously based on synchronization signal, then initial phase alignment can be achieved, but accuracy is poor and drift occurs over time
Solution Approach 1:
The patent performs preliminary phase measurement and adjustment before synthesizer operation begins, using phase measurement circuits to detect initial phase differences and applying correction factors in advance, ensuring high accuracy from the start rather than relying on simple simultaneous startup
Solution Approach 2:
The patent implements continuous feedback through phase measurement circuits that monitor phase differences in real-time and provide adjustment signals to maintain synchronization, preventing drift over time through active correction rather than passive initial alignment
4Ease of operation
If synthesizers are started or reset simultaneously based on synchronization signal, then initial phase alignment can be achieved, but drift occurs over time due to errors
Solution Approach 1:
The patent performs preliminary phase measurement and adjustment before synthesizer operation begins, using phase measurement circuits to detect initial phase differences and applying correction factors in advance, ensuring high accuracy from the start rather than relying on simple simultaneous startup
Solution Approach 2:
The patent implements continuous feedback through phase measurement circuits that monitor phase differences in real-time and provide adjustment signals to maintain synchronization, preventing drift over time through active correction rather than passive initial alignment
Data Source
AI summary
Embodiments of the present invention synchronize multiple synthesizers, such as phase-locked loops (PLLs), in a manner that does not require communication or coordination between the synthesizers. Specifically, each synthesizer is part of a synthesizer circuit that includes a synthesizer (e.g., a PLL), a phase measurement circuit, and a synchronization circuit. A common reference signal (e.g., an alternating clock signal) is provided to the synthesizer circuits. In one exemplary embodiment, in each synthesizer circuit, the phase measurement circuit measures a phase difference between the reference signal and a corresponding output of the synthesizer, and the synchronization circuit adjusts the synthesizer operation based on the measured phase difference in such a way that all of the synthesizers operate in-phase with one another relative to the common reference signal, without having any communication or coordination between the two synthesizer circuits other than provision of the common reference signal.