Cross-Coupled Charge Pump Biasing for Higher Output Impedance
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Solution Overview
Problem
Existing charge pump circuits in semiconductor memory devices face limitations in achieving high output impedance without increasing the gate length of transistors, which restricts integration and split performance, especially when the duty of input signals is not 50%, leading to unequal voltages at output terminals.
Innovation Solution
A cross-coupled load unit with a cascade connection structure and bias determination units that independently adjust transistor biases, increasing output impedance through a cascade connection and current mirror structure, allowing for improved split performance without extending transistor gates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the gate length of load transistors is increased to increase output impedance, then output impedance is improved, but area occupied increases causing integration limitations
Solution Approach 1:
The load transistor is divided into two cascaded transistors (first load transistor and second load transistor). This segmentation allows the output impedance to be increased through the cascade connection without requiring a single transistor with an excessively long gate, thereby reducing the area occupied while maintaining high output impedance.
Solution Approach 2:
Instead of increasing output impedance by extending the gate length in one dimension, the patent uses a cascade connection structure that adds another dimension to the impedance enhancement. The cascaded transistors multiply their individual impedances, achieving high output impedance without proportional area increase.
2Measurement precision
If the gate length of load transistors is increased to improve split performance, then split performance is improved, but device complexity and integration are limited
Solution Approach 1:
The load transistor is segmented into two cascaded transistors with independent bias control. This segmentation enables better split performance by allowing independent optimization of each transistor's contribution to the output impedance, without requiring an excessively long gate that would complicate integration.
Solution Approach 2:
The patent introduces dynamic bias control where the bias voltages of the cascaded transistors can be independently adjusted. This dynamic control allows optimization of split performance under varying operating conditions without increasing gate length or complicating the device structure.
3Power
If cross-coupled charge pump is used to generate high voltage, then high voltage generation is achieved, but output voltages become unequal when input signal duty is not 50%
Solution Approach 1:
The patent employs a feedback mechanism where the bias voltages of the cascaded load transistors are adjusted based on the output voltages. This feedback ensures that even when the input signal duty deviates from 50%, the output voltages remain equal by dynamically compensating for imbalances through independent bias control.
Solution Approach 2:
The patent changes the bias parameters of the cascaded transistors to maintain output voltage equality. By independently adjusting the bias voltages of the first and second load transistors, the circuit compensates for duty cycle variations and ensures symmetric output voltages while maintaining high voltage generation capability.
Data Source
AI summary
A charge pump circuit may include a cross-coupled load unit and a bias determination unit. The cross-coupled load unit may receive first and second input signals applied with mutually opposite phases to obtain a charge pumping. The cross-coupled load unit may have first and second output terminals that may be connected with transistors in a cascade connection structure. The bias determination unit may have a current mirror structure, and independently determine biases of a transistor among the cascade structure connected transistors in response to voltages of the first and second output terminals.