Protected Level Shifter Circuit for Low-Voltage Signal Transition

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Solution Overview

Problem

Conventional level shifter circuits in semiconductor devices experience unstable operation and increased delay in low power supply voltage environments due to the large gate insulation film thickness and high threshold voltage of NMOS transistors, leading to inadequate voltage level shifting and output signal recognition.

Innovation Solution

A level shifter circuit design incorporating a pull-up unit, a pull-down unit, and a protection unit, where the pull-down unit is implemented with slim transistors for enhanced current driving capability and the protection unit prevents high voltage from directly affecting the pull-down unit, ensuring stable operation even at low power supply voltages without increasing circuit area.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If NMOS transistors with large gate insulation film thickness are used in conventional level shifter circuits, then reliability is improved, but transition delay increases and operation becomes unstable in low power supply voltage environments

Engineering Contradiction:

ImprovereliabilityVSAvoidtransition delay

Core Design Contradiction:

ReliabilityVSLoss of time

Solution Approach 1:

The patent applies different transistor types with optimized characteristics to different circuit locations: slim transistors are used specifically in the pull-down unit where fast switching is critical, while thick transistors are used in the pull-up unit where reliability is more important. This local differentiation resolves the contradiction by optimizing each location for its specific functional requirements.

Inventive Principle:

Principle #3Local quality

Solution Approach 2:

The level shifter circuit is segmented into distinct pull-up and pull-down units, each with independently optimized transistor characteristics. The pull-down unit uses slim transistors for fast transition, while the pull-up unit uses thick transistors for reliability, allowing each segment to be optimized for its specific function without compromising the other.

Inventive Principle:

Principle #1Segmentation

2Reliability

If NMOS transistors with high threshold voltage are used, then reliability is improved, but voltage level shifting capability deteriorates in low power supply voltage environments

Engineering Contradiction:

ImprovereliabilityVSAvoidvoltage level shifting capability

Core Design Contradiction:

ReliabilityVSEase of operation

Solution Approach 1:

Different transistor threshold voltages are applied locally to different circuit functions: slim transistors with low threshold voltage are used in the pull-down unit to enable effective voltage level shifting in low power environments, while thick transistors with high threshold voltage are used in the pull-up unit to ensure reliability.

Inventive Principle:

Principle #3Local quality

3Speed

If slim transistors are used to reduce transition delay, then speed is improved, but reliability deteriorates due to inadequate voltage protection

Engineering Contradiction:

Improvetransition speedVSAvoidreliability

Core Design Contradiction:

SpeedVSReliability

Solution Approach 1:

The circuit is segmented into pull-up and pull-down units with different transistor types. Slim transistors are confined to the pull-down unit where speed is critical, while thick transistors are used in the pull-up unit where reliability is paramount, allowing each segment to be optimized for its primary function.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The pull-up unit acts as an intermediary between the input signal and the output, protecting the slim transistors in the pull-down unit from voltage overload. This intermediary structure allows slim transistors to operate at full speed without compromising reliability, as the pull-up unit buffers and protects them from harmful voltage conditions.

Inventive Principle:

Principle #24Intermediary (Mediator)

4Area of stationary object

If conventional level shifter circuit design is used, then circuit area is minimized, but operation stability deteriorates in low power supply voltage environments

Engineering Contradiction:

Improvecircuit areaVSAvoidoperation stability

Core Design Contradiction:

Area of stationary objectVSStability of the object's composition

Solution Approach 1:

The patent maintains a compact circuit area by using only necessary transistors with locally optimized characteristics rather than uniformly using oversized transistors throughout. Slim transistors reduce area compared to thick transistors, and by placing them only where needed (pull-down unit), the overall circuit area is minimized while achieving stable operation in low power environments.

Inventive Principle:

Principle #3Local quality

Data Source

PatentUS8030987B2Level shifter circuit and semiconductor device having the same

Publication Date: 2011.10.04 SK HYNIX INC

AI summary

A level shifter circuit includes a pull-up unit configured to pull up an output node to a second voltage level being higher than a first voltage level in response to an input signal swinging with an amplitude of the first voltage level, a pull-down unit configured to pull down the output node in response to the input signal, and a protection unit connected between the output node and the pull-down unit to prevent a voltage of the output node from being applied to the pull-down unit.