Segmented Phase Interpolator for High-Linearity Clock Shifting
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Solution Overview
Problem
Existing phase interpolators exhibit significant nonlinearity, which is not adequately addressed in typical SerDes applications, leading to suboptimal performance in precision clock generation and other high-linearity requirements.
Innovation Solution
A high-resolution phase interpolator design that eliminates the need for quadrature input signals and common-mode feedback, utilizing digital control signals to generate precise phase shifts with 11-bit resolution and improved linearity, achieving a maximum integral nonlinearity of 120 fs (1.2 LSB) compared to 6000 fs in prior art.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional phase interpolators are used, then device complexity is reduced, but manufacturing precision deteriorates due to significant nonlinearity
Solution Approach 1:
The phase interpolation function is divided into multiple segments, each handled by a dedicated current source. The control signal is segmented into multiple bits that independently control different current sources, allowing each segment to be optimized for linear operation in its specific range.
Solution Approach 2:
Different current sources are designed with different characteristics optimized for specific phase ranges. Each current source handles a local portion of the phase interpolation task with tailored current levels and timing, ensuring optimal linearity in each local region while maintaining overall system linearity.
2Reliability
If quadrature input signals and common-mode feedback are used, then reliability is improved, but device complexity increases
Solution Approach 1:
The patent extracts and eliminates the requirement for quadrature input signals and common-mode feedback circuits from the phase interpolator design. The invention achieves reliable operation using only a single input clock signal and digital control signals, removing complex analog feedback paths and quadrature signal generation requirements.
Solution Approach 2:
Analog feedback mechanisms and quadrature signal processing are replaced with digital control signals. The phase interpolation is controlled through digital logic that generates control signals for current sources, substituting complex analog signal processing with simpler digital control.
3Measurement precision
If conventional phase interpolators are used, then ease of operation is maintained, but measurement precision deteriorates due to nonlinearity
Solution Approach 1:
The phase interpolator employs dynamic current sources that adjust their output characteristics based on the phase interpolation requirement. The current sources are dynamically controlled by digital signals that adapt the current levels and timing to achieve linear phase output across the full range, maintaining ease of digital control while improving measurement precision.
Data Source
AI summary
A high linearity phase interpolator (PI) is disclosed. A phase value parameter indicative of a desired phase difference between an output signal and an input clock signal edge may be provided by control logic. A first capacitor may be charged for a first period of time with a first current that is proportional to the phase value parameter to produce a first voltage on the capacitor that is proportional to the phase value parameter. The first capacitor may be further charged for a second period of time with a second current that has a constant value to form a voltage ramp offset by the first voltage. A reference voltage may be compared to the voltage ramp during the second period of time. The output signal may be asserted at a time when the voltage ramp equals the reference voltage.