Injection-Locked Clock Multiplier With Dual Error Correction
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Solution Overview
Problem
Existing injection-locked clock multipliers face challenges in reducing area and power consumption while operating at low voltages, and are affected by high noise levels and frequency errors due to injection path non-ideality.
Innovation Solution
An injection-locked clock multiplier with an oscillator control unit, error detector, and error adjuster that separately detects frequency errors and injection path non-ideality, using a ring oscillator and digital-to-analog converters to adjust oscillator frequency and cycle based on detected errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If a ring oscillator is used to reduce area and power consumption, then area and power consumption are reduced, but noise levels increase
Solution Approach 1:
The patent implements feedback mechanisms through error detectors that monitor the oscillator output and generate correction signals. The first error detector detects frequency errors and generates first correction signals, while the second error detector detects injection path non-ideality and generates second correction signals. These feedback loops enable the system to maintain low noise performance despite using a compact ring oscillator by continuously correcting deviations.
2Measurement precision
If frequency error detection and injection path error detection are performed together, then both errors are detected, but device complexity increases
Solution Approach 1:
The patent divides error detection into two separate functional segments: a first error detector dedicated to detecting frequency errors and generating first correction signals, and a second error detector dedicated to detecting injection path non-ideality and generating second correction signals. This segmentation allows each detector to be optimized for its specific function, reducing the complexity that would arise from attempting to detect both error types in a single circuit.
Solution Approach 2:
The error detection unit is designed to perform multiple functions through its two detectors that operate in different operation modes. The first error detector functions in a first operation mode for frequency error detection, while the second error detector functions in a second operation mode for injection path error detection. This multi-functional design enables comprehensive error detection without proportionally increasing overall circuit complexity.
3Measurement precision
If multiple error detection circuits are used to detect both frequency errors and injection path errors, then detection accuracy improves, but area increases
Solution Approach 1:
The patent combines the first error detector and second error detector into a single integrated error detection unit. This unified structure allows both detectors to share common circuit resources such as logic gates, flip-flops, and signal paths, thereby reducing the total area required compared to implementing them as completely separate circuits. The merging maintains the functional separation needed for accurate detection while optimizing the physical layout to minimize area occupation.
Data Source
AI summary
An injection-locked clock multiplier includes an oscillator control unit configured to output an injection clock signal with a frequency of N times a reference clock signal, an error detector configured to detect a frequency error indicating whether a frequency of the injection clock signal corresponds to the N times the frequency of the reference clock signal in a first operation mode and configured to detect an error due to injection path non-ideality from the injection clock signal in a second operation mode, and an error adjuster configured to receive one of information on the frequency error and information on the error due to the injection path non-ideality from the error detection unit and configured to adjust an operation frequency of the oscillator based on the frequency error or configured to adjust an operation cycle of the oscillator based on the error due to the injection path non-ideality.


