CDR Phase Interpolator Step Sizing for Jitter and Linearity
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Solution Overview
Problem
Existing clock data recovery (CDR) systems face a tradeoff between bandwidth and jitter performance due to the use of large step sizes for phase adjustment, which can lead to overcorrection and degradation of jitter performance, and the step-size selection circuits do not account for non-linearities in phase interpolators, degrading jitter tolerance.
Innovation Solution
A step-size selection circuit that adjusts phase control signals based on phase zones, selecting smaller step sizes during non-linear transitions and larger step sizes elsewhere to improve jitter tolerance and maintain CDR bandwidth.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If large step sizes are used for phase adjustment, then CDR bandwidth is improved, but jitter performance deteriorates due to overcorrection
Solution Approach 1:
The patent applies dynamics by making the step size adjustable and variable rather than fixed. The step-size selection circuit dynamically selects between first and second step sizes based on the phase control signal value, allowing the system to adapt the adjustment granularity to the current operating condition. This dynamic adjustment resolves the contradiction by using larger steps for coarse adjustment (maintaining bandwidth) and smaller steps for fine adjustment (improving jitter performance).
Solution Approach 2:
The patent changes the parameter of step size from a constant value to a variable parameter that depends on the phase control signal. By introducing multiple step size values (first step size and second step size) and selecting appropriate values based on the phase control signal range, the system optimizes both bandwidth and jitter performance under different operating conditions.
2Device complexity
If uniform step sizes are used for phase adjustment, then device complexity is reduced, but linearity deteriorates due to non-linearities at phase switching boundaries
Solution Approach 1:
The patent applies local quality by using different step sizes for different regions (phase zones) of the phase control signal range. Instead of applying a uniform step size across the entire range, the system uses a first step size for certain phases and a second step size for other phases, thereby compensating for local non-linearities at phase switching boundaries and improving overall linearity.
3Speed
If larger step sizes are used for phase adjustment, then adjustment speed is improved, but precision deteriorates due to overcorrection
Solution Approach 1:
The patent segments the phase adjustment process into multiple stages with different step sizes. The phase control signal range is divided into different zones, and each zone uses an appropriate step size - larger steps for regions requiring faster adjustment and smaller steps for regions requiring higher precision. This segmentation allows the system to achieve both fast adjustment speed and high precision.
Data Source
AI summary
A method for phase adjustment includes receiving a phase control signal for a phase interpolator, determining the phase control signal is located within one of first phase zones, and adjusting the phase control signal by a first step size upon determining the phase control signal is located within one of the first phase zones. The method also includes determining the phase control signal is located within one of second phase zones, and adjusting the phase control signal by a second step size larger than the first step size upon determining the phase control signal is located within one of the second phase zones.