PLL Reference Frequency Control for Low-Spur VCO Output
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Solution Overview
Problem
Conventional PLL circuits suffer from deteriorated spurious output characteristics, which fluctuate with temperature changes due to fixed reference frequencies and frequency division ratios, affecting performance across different channels.
Innovation Solution
A PLL circuit with a reference frequency generation circuit, phase comparison means, loop filter, and control section that stores optimal frequency division ratios for each channel and temperature, allowing dynamic adjustment of frequency division ratios and reference frequencies to improve spurious output characteristics, integrated within a miniaturized PLL IC.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If fixed reference frequencies and frequency division ratios are used in conventional PLL circuits, then the circuit structure is simple, but the spurious output characteristics deteriorate and fluctuate with temperature changes
Solution Approach 1:
The patent implements dynamic adjustment of frequency division ratios based on temperature detection. The control section modifies the frequency division ratio in response to temperature changes detected by the temperature detection section, transforming the static PLL circuit into a dynamic system that adapts to environmental conditions to maintain stable spurious output characteristics
Solution Approach 2:
The patent changes the frequency division ratio parameter according to temperature variations. By detecting temperature and accordingly adjusting the frequency division ratio parameter, the system compensates for temperature-induced fluctuations in spurious output characteristics without requiring complete circuit redesign
2Reliability
If frequency division ratios are adjusted for each channel to improve spurious output characteristics, then the spurious output characteristics improve, but the control complexity increases
Solution Approach 1:
The patent implements self-service control where the control section automatically determines and adjusts the frequency division ratio based on temperature detection and channel information. The system serves itself by autonomously selecting optimal frequency division ratios without requiring external intervention or complex manual control mechanisms
Solution Approach 2:
The patent establishes a feedback loop where temperature is detected, the control section processes this information along with channel data, and adjusts the frequency division ratio accordingly. This closed-loop feedback mechanism enables automatic optimization of spurious output characteristics while simplifying operation
3Volume of moving object
If the PLL circuit is miniaturized by integrating components into one chip, then the device size is reduced, but the precision of frequency control may be affected
Solution Approach 1:
The patent integrates multiple functions into a single PLL IC, including the temperature detection section and control section within the integrated circuit. This multi-functional integration reduces device size while maintaining frequency control precision through coordinated operation of integrated components
Solution Approach 2:
The patent replaces potential external mechanical or discrete components with integrated electronic circuits on a single chip. The temperature detection and control functions are implemented through electronic means within the PLL IC, achieving miniaturization without sacrificing frequency control precision
Data Source
AI summary
A PLL circuit which can obtain a VCO output having satisfactory spurious output characteristics with respect to all channels and which can suppress the fluctuation of the characteristics due to a temperature change is disclosed. A control circuit 3 provides a frequency division ratio table 32 where frequency division ratios to improve spurious output characteristics in the output of a VCO for each channel number at temperatures are stored, and the control circuit reads, from the table 32, the frequency division ratio corresponding to the temperature detected by the temperature sensor 31 and an input channel number, to set the frequency division ratio in a PLL IC 2 and to set the channel number and the frequency division ratio in a DDS circuit 4. The DDS circuit 4 calculates the value of a reference frequency based on the channel number and the frequency division ratio to generate the reference frequency.