Phase Mixer Circuit for Linear Clock Phase Adjustment
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Solution Overview
Problem
Existing clock generation circuits in semiconductor apparatuses face challenges in generating internal clock signals with accurate phase changes that are not linear with respect to changes in the mixed code signal, leading to reduced precision and operation reliability.
Innovation Solution
A phase mixer circuit that includes an intermediate clock generation circuit and a mixing circuit, which generates an intermediate clock signal between two input clock signals and adjusts the phase mixing based on a mixed code signal to achieve linear phase changes in the output clock signal.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a conventional clock generation circuit mixes phases of source clock signals directly, then the circuit structure is simple, but the phase change is not linear with respect to changes in the mixed code signal, reducing precision
Solution Approach 1:
The phase mixing process is segmented into multiple stages: first generating an intermediate clock signal with intermediate phase between two source clock signals, then mixing the target phase by combining one source clock signal and the intermediate clock signal. This segmentation enables linear phase adjustment according to the mixed code signal while maintaining circuit feasibility.
Solution Approach 2:
An intermediate clock signal is introduced as a mediator between the two source clock signals. This intermediate signal has a phase that is intermediate between the phases of the first and second source clock signals, serving as a bridge to achieve precise linear phase mixing without requiring direct complex mixing of the original source signals.
2Reliability
If the phase mixing ratio is determined directly from the mixed code signal value, then the control is simple, but the phase changes non-linearly, reducing operation reliability
Solution Approach 1:
The phase mixing mechanism is made dynamic by selectively choosing which clock signals to mix based on the value of the mixed code signal. When the mixed code signal value is less than a reference value, the circuit mixes the first source clock signal with the intermediate clock signal; when greater than or equal to the reference value, it mixes the second source clock signal with the intermediate clock signal. This dynamic adaptation ensures linear phase changes across the entire control range.
Data Source
AI summary
A phase mixer circuit is configured to receive a first input clock signal and a second input clock signal, and to generate an intermediate clock signal having an intermediate phase between phases of the first and second input clock signals. The phase mixer circuit is configured to determine a logic value of a mixed code signal, and to generate an output clock signal by mixing one of the first and second input clock signals and the intermediate clock signal.