Switched-Impedance PLL Loop Filter for Low-Area, Low-Noise Locking
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing phase-locked loop (PLL) circuits face challenges in achieving low silicon area and low power consumption, particularly due to large capacitor requirements in analog PLLs and high 1/f noise, while digital PLLs struggle with power efficiency, especially in older CMOS processes.
Innovation Solution
The implementation of a switched resistor network in the PLL circuitry, which adjusts effective resistance based on pulsing properties of a control signal, reduces the impact of 1/f noise and minimizes capacitor area, combined with high gain phase detectors and efficient frequency detection methods for rapid frequency acquisition.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a charge pump PLL is used, then the PLL can be implemented with a well-proven analog architecture, but it requires a very large capacitor in the loop filter which increases silicon area
Solution Approach 1:
The patent changes the fundamental parameter of the loop filter from a passive RC network to an active switched-resistor network. By using switches to dynamically control the resistance values, the effective resistance can be much higher than physical resistor values, allowing smaller capacitors to achieve the same time constants and filtering performance.
Solution Approach 2:
The patent replaces the traditional passive mechanical RC filtering approach with an active digital-controlled switching system. The switched-resistor loop filter uses digital logic to control switches that connect resistors to the loop filter, replacing the need for large physical capacitors with a more compact active control mechanism.
2Reliability
If a charge pump PLL is used, then the analog implementation is well-proven, but 1/f noise from the charge pump increases phase noise
Solution Approach 1:
The patent extracts and removes the charge pump component that generates 1/f noise from the system. By replacing the charge pump with a current-mode phase detector and switched-resistor loop filter, the harmful 1/f noise source is eliminated while retaining the essential PLL functionality.
Solution Approach 2:
The patent converts the potential harm of complex circuitry into a benefit by using switched-resistor networks that achieve high resistance values (reducing noise impact) through active switching rather than large physical resistors. The switching action itself, which could be a source of noise, is used beneficially to dynamically adjust loop filter characteristics.
3Area of stationary object
If a digital PLL is used, then the loop filter can be small in area and easily configured, but power consumption increases due to continuous switching between supply and ground
Solution Approach 1:
The patent employs periodic switching actions in the switched-resistor loop filter where resistors are switched on and off in a controlled manner. This periodic action allows the circuit to achieve the desired filtering effect during specific time windows while remaining in a low-power state during other periods, reducing overall power consumption compared to continuous switching.
Solution Approach 2:
The patent introduces dynamic control of the loop filter characteristics through voltage-controlled switches that adjust resistance values based on the PLL's operational state. This dynamic adaptation allows the loop filter to be more efficient at different operating conditions, reducing power consumption while maintaining small area.
4Area of stationary object
If switched resistor networks are used to reduce capacitor area, then silicon area is minimized, but circuit complexity increases
Solution Approach 1:
The patent designs the switched-resistor loop filter to perform multiple functions: it acts as a low-pass filter, provides gain control, and enables dynamic bandwidth adjustment. By making the loop filter multi-functional, the patent reduces the need for separate components, thereby minimizing overall silicon area despite the added switching complexity.
Solution Approach 2:
The patent merges the phase detector, loop filter, and voltage-controlled oscillator control into a tightly integrated switched-resistor network. This consolidation combines multiple functions into a single compact circuit block, reducing the total silicon area required while managing complexity through functional integration.
Data Source
AI summary
Phase-locked loop circuitry to generate an output signal, the phase-locked loop circuitry comprising oscillator circuitry, switched resistor loop filter, coupled to the input of the oscillator circuitry (which, in one embodiment, includes a voltage-controlled oscillator), including a switched resistor network including at least one resistor and at least one capacitor, wherein an effective resistance of the switched resistor network is responsive to and increases as a function of one or more pulsing properties of a control signal (wherein pulse width and frequency (or period) are pulsing properties of the control signal), phase detector circuitry, having an output which is coupled to the switched resistor loop filter, to generate the control signal (which may be periodic or non-periodic). The phase-locked loop circuitry may also include frequency detection circuitry to provide a lock condition of the phase-locked loop circuitry.