Inner-Eye Clock Phase Alignment for PAM-4 Receiver Timing

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Solution Overview

Problem

PAM-4 receivers face challenges in precise synchronization between symbols and clock edges, leading to increased errors and reduced speed performance due to imprecise timing and misalignment of sample instants.

Innovation Solution

The proposed receiver includes a data-recovery circuit, clock-recovery circuit, and an inner-eye phase-adjustment circuit to align the clock signal phase with symbol eyes, utilizing an inner-eye boundary filter and misalignment detector to adjust the phase of the clock signal based on detected symbol eyes, ensuring precise timing and reduced jitter.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If conventional clock synchronization methods are used in PAM-4 receivers, then the system structure remains simple, but timing alignment between clock edges and symbol centers deteriorates, leading to increased errors

Engineering Contradiction:
Improvetiming alignment precisionVSAvoidreceiver circuit complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent introduces an inner-eye phase-adjustment circuit as an intermediary component between the clock-recovery circuit and the data-recovery circuit. This circuit detects symbol eyes from the M-bit digital signal and adjusts the clock signal phase based on detected eye positions, serving as a mediator that bridges timing synchronization without requiring complete redesign of the entire receiver architecture

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The receiver is segmented into distinct functional blocks: data-recovery circuit, clock-recovery circuit, and inner-eye phase-adjustment circuit. Each block performs a specific function, allowing the phase-adjustment functionality to be added as a separate module rather than integrating it throughout the entire system, thus managing complexity through functional segmentation

Inventive Principle:
Principle #1Segmentation

2Reliability

If precise timing synchronization is implemented, then bit-error rate improves, but device complexity increases due to additional phase-adjustment circuits

Engineering Contradiction:
Improvebit-error rateVSAvoidcircuit structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The inner-eye phase-adjustment circuit uses the signal eyes themselves as the reference for phase adjustment. By detecting the positions of symbol eyes directly from the received signal and using these detected positions to adjust the clock phase, the system performs self-calibration without requiring external reference signals or additional complex synchronization infrastructure

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The phase-adjustment circuit implements a feedback mechanism where the detected eye positions are continuously monitored and used to adjust the clock signal phase. This closed-loop feedback ensures that timing synchronization is maintained dynamically, improving reliability by continuously correcting phase drift while keeping the complexity localized to the feedback control mechanism

Inventive Principle:
Principle #23Feedback

3Stability of the object's composition

If sample instants are not precisely timed to symbols, then device complexity remains low, but timing margins decrease and jitter tolerance is reduced

Engineering Contradiction:
Improvetiming margin stabilityVSAvoidphase-adjustment mechanism complexity
Core Design Contradiction:
Stability of the object's compositionVSDevice complexity

Solution Approach 1:

The inner-eye phase-adjustment circuit performs preliminary phase alignment by detecting symbol eyes and adjusting the clock phase before the actual data sampling occurs. This preliminary action ensures that subsequent sample instants are already optimally positioned relative to symbol centers, establishing timing margins in advance rather than attempting to correct timing issues during sampling

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS12476653B1Methods and circuits for inner-eye timing center detection and clock phase alignment
Publication Date: 2025.11.18 CADENCE DESIGN SYST INC
  • US12476653B1 patent drawing
  • US12476653B1 patent drawing
  • US12476653B1 patent drawing

AI summary

A receiver may sample an amplitude-modulated input signal expressed as a series of symbols using a clock signal with edges aligned to the symbols. Repeated symbols and the level transitions between them may form signal eyes. The receiver may detect the inner signal eyes and aligns the phase of the clock signal relative to the symbols responsive to the detected timing center of signal eyes and corresponding symbol patterns.