Hybrid Delay-Locked Loop With Analog Dead-Zone Stabilization

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Solution Overview

Problem

Existing multiphase clock generation circuits face issues with jitter characteristics and steady-state frequency fluctuations, particularly in DLL-based systems, which require high resolution and longer convergence times, while register-based systems need specific reference clock frequencies.

Innovation Solution

A hybrid delay-locked loop combining a digital control loop with a dead zone and an analog control loop, allowing for high-speed and stable operation by switching between the two control loops to reduce the number of control bits and stabilize frequency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If an all-digital DLL is used to expand the variable range, then steady-state frequency fluctuations are reduced, but higher resolution (more control bits) is required and convergence time increases

Engineering Contradiction:

Improvesteady-state frequency stabilityVSAvoidnumber of control bits

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The control loop is segmented into two distinct loops: an analog control loop for coarse frequency adjustment and a digital control loop for fine frequency adjustment. This segmentation allows each loop to operate optimally within its designated range, reducing the overall complexity requirements

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The system dynamically switches between analog and digital control modes based on the frequency deviation magnitude. The analog loop handles large deviations quickly, then transitions to digital loop for precise steady-state control, optimizing both response time and stability

Inventive Principle:

Principle #15Dynamics

2Adaptability or versatility

If an analog control loop is used to achieve wide frequency-variable range, then variable range is expanded, but steady-state frequency fluctuations increase due to increased loop gain

Engineering Contradiction:

Improvefrequency-variable rangeVSAvoidsteady-state frequency stability

Core Design Contradiction:

Adaptability or versatilityVSReliability

Solution Approach 1:

The control system dynamically adjusts its mode based on operating conditions. The analog loop is activated when wide frequency adjustment is needed, while the digital loop takes over when steady-state precision is required, creating a dynamic hybrid system

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The hybrid control architecture acts as an intermediary between the conflicting requirements of wide frequency range and steady-state stability. The system seamlessly transitions between analog and digital control modes to maintain both capabilities

Inventive Principle:

Principle #24Intermediary (Mediator)

3Device complexity

If a digital phase detector with dead zone is used in the digital control loop, then the analog phase detector operates only in the dead zone, but this requires careful coordination between the two loops

Engineering Contradiction:

Improvecircuit structure simplificationVSAvoidcontrol loop coordination

Core Design Contradiction:

Device complexityVSEase of operation

Solution Approach 1:

Each phase detector is designed with specific local characteristics: the digital phase detector has a dead zone optimized for small phase errors, while the analog phase detector is optimized for larger phase differences. This local optimization allows each detector to excel in its specific operating region

Inventive Principle:

Principle #3Local quality

Data Source

PatentUS20260012187A1Hybrid delay-locked loop

Publication Date: 2026.01.08 MURATA MFG CO LTD

AI summary

A hybrid delay-locked loop Includes: a digital control loop including a digital phase detector having a dead zone; and an analog control loop including an analog phase detector that operates in the dead zone.