Switchable FLL/PLL Oscillator for Battery Monitor Clock Sync
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Solution Overview
Problem
Synchronizing clocks of multiple converters in systems like electric vehicles is challenging due to impracticality of providing a reference clock in high-voltage environments, such as battery systems, which is necessary for phase-locked loops (PLLs).
Innovation Solution
Implementing an oscillator circuit that can switch between frequency-locked loop (FLL) and PLL operation, allowing synchronization without a reference clock, using a control circuit to manage the transition between modes based on communication needs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a reference clock is provided to synchronize clocks in high-voltage battery systems, then clock synchronization accuracy is improved, but system complexity and safety requirements increase due to the need for isolation components
Solution Approach 1:
The patent extracts the reference clock signal from the high-voltage domain and processes it in the low-voltage domain using isolation components. The reference clock is taken out from the dangerous high-voltage environment, converted to a low-voltage signal, and then distributed to multiple monitors, thereby achieving synchronization while reducing system complexity and safety requirements.
Solution Approach 2:
The patent introduces isolation components (such as isolators or optocouplers) as intermediaries between the high-voltage reference clock source and the low-voltage monitor circuits. These intermediary components safely transfer the clock signal across the high-voltage boundary without requiring direct high-voltage connections to each monitor, thereby simplifying the overall system architecture.
2Measurement precision
If multiple battery monitors are used to measure cell voltages, then measurement coverage is improved, but clock synchronization becomes more difficult without a reference clock
Solution Approach 1:
The patent segments the clock synchronization function into two parts: a centralized reference clock generation in one monitor that serves as the master, and local phase-locked loop implementations in each monitor that lock to this reference. This segmentation allows multiple monitors to operate independently with full measurement coverage while maintaining synchronized timing through the master-slave relationship.
Solution Approach 2:
The patent implements phase-locked loops in each battery monitor that use feedback mechanisms to lock their local oscillators to the reference clock signal from the master monitor. The feedback control in the PLL circuits automatically adjusts phase and frequency deviations, ensuring all monitors remain synchronized without requiring direct reference clock connections to each unit.
3Reliability
If impedance determination is performed by measuring voltage and current ratios, then thermal runaway prediction capability is improved, but clock synchronization between voltage and current measurements becomes critical
Solution Approach 1:
The patent merges the clocking systems of the voltage measurement circuit and current measurement circuit within each battery monitor by using the same phase-locked loop-derived clock signal for both analog-to-digital converters. This ensures that voltage and current samples are taken at precisely synchronized time points, enabling accurate impedance calculation for thermal runaway detection.
Data Source
AI summary
An integrated circuit (IC) includes an oscillator circuit having a control input. A control circuit has a control output coupled to the control input. The control circuit is configured to generate a control signal to the control input of the oscillator circuit to cause: the oscillator circuit to be configured as a frequency-locked loop in response to the control signal being in a first state; and the oscillator circuit to be configured as a phase-locked loop in response to the control signal being in a second state.