On-Chip PLL Loop Attenuation for Stable Low-Power Operation
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Solution Overview
Problem
The challenge is to reduce variations in the characteristics of a phase locked loop (PLL) circuit due to transistor size variations and minimize circuit scale and power consumption in semiconductor integrated circuits, particularly when on-chipping a loop filter.
Innovation Solution
A semiconductor integrated circuit with a phase locked loop circuit comprising a phase frequency comparator, loop attenuator, charge pump, loop filter, voltage controlled oscillator, and divider, where the loop attenuator includes a sampling circuit and counter to manage charging and discharging currents, reducing variations and power consumption by on-chipping the loop filter.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If the loop filter is on-chipped in a PLL circuit, then the circuit integration is improved, but variations in device size of transistors cause variations in PLL circuit characteristics
Solution Approach 1:
The patent combines the loop filter with the charge pump circuit to form an integrated on-chip PLL circuit. The loop filter is implemented using on-chip capacitors and resistors, merging previously separate discrete components into a unified integrated circuit structure, thereby achieving both compact integration and controlled characteristic variations
Solution Approach 2:
The patent adjusts the capacitance values of the on-chip capacitors in the loop filter to optimize performance. By carefully selecting and tuning the capacitor values (C1, C2, C3), the circuit achieves stable operation despite transistor size variations, effectively managing the trade-off between integration and characteristic stability
2Area of stationary object
If the loop filter is on-chipped, then the circuit scale is reduced, but power consumption increases
Solution Approach 1:
The patent employs a charge pump circuit that operates in periodic charging and discharging cycles. The charge pump alternates between pumping charge to the loop filter capacitors and resetting, enabling the on-chip loop filter to function with reduced continuous power consumption while maintaining compact integration
Solution Approach 2:
The on-chip loop filter uses the charge pump's periodic operation to automatically charge and discharge the filter capacitors without requiring external power management circuitry. The integrated design allows the filter to self-regulate its operation based on the charge pump cycles, reducing overall power consumption while maintaining small circuit scale
Data Source
AI summary
An on-chip phase-locked loop circuit has reduced power consumption in a semiconductor integrated circuit. The phase locked loop circuit is equipped with a phase frequency comparator, a loop attenuator, a charge pump, a loop filter, a voltage controlled oscillator and a divider. The attenuator includes a sampling circuit and a counter. A sampling pulse and first and second output signals both outputted from the phase frequency comparator are supplied to the sampling circuit. The sampling circuit outputs a sampling output signal. When the counter completes a countup of a predetermined number of sampling pulses outputted from the sampling circuit, the counter outputs a countup completion output signal. The charge pump outputs a charging current or a discharging current to the loop filter in response to the countup completion output signal.