Temperature-Compensated Clock Generation With PLL Noise Suppression

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Solution Overview

Problem

Existing clock generation systems face challenges in maintaining accurate frequency output independent of temperature variations and suppressing noise interference, particularly when using MEMS resonators and phase-locked loops (PLLs), which can introduce spurious components and noise into the output clock signal.

Innovation Solution

The proposed clock generation apparatus employs a combination of a voltage-controlled oscillator (VCO), a temperature sensor, a temperature analog-to-digital converter (TADC), a digital temperature compensation circuit, and a low-pass filter (LPF) to maintain frequency stability across temperature changes, while also using an analog temperature compensation circuit to reduce noise interference. This system includes an oven control circuit to maintain a constant resonator temperature and utilizes a phase-locked loop (PLL) to phase-lock an internal clock signal to the output clock signal, ensuring it operates at an integer multiple of the output frequency, thereby reducing spurious components.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-affected harmful factors

If a phase-locked loop (PLL) is used to generate an internal clock signal at an integer multiple of the output frequency, then noise interference and spurious components are suppressed, but the device complexity increases

Engineering Contradiction:
Improvenoise interference and spurious componentsVSAvoiddevice complexity
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The patent introduces an intermediary PLL circuit that generates an internal clock signal at an integer multiple of the output frequency. This intermediary signal serves as a mediator between the output clock signal and the temperature compensation process, allowing noise suppression while maintaining system functionality. The PLL acts as a bridge that enables frequency multiplication without directly modifying the original clock signal path.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Stability of the object's composition

If digital temperature compensation is implemented to maintain frequency accuracy across temperature variations, then frequency stability is improved, but device complexity increases

Engineering Contradiction:
Improvefrequency stabilityVSAvoiddevice complexity
Core Design Contradiction:
Stability of the object's compositionVSDevice complexity

Solution Approach 1:

The temperature compensation function is segmented into two independent paths: an analog temperature compensation circuit and a digital temperature compensation circuit. Each path handles different aspects of temperature compensation, allowing the system to achieve comprehensive frequency stability while distributing the complexity across separate modular components rather than concentrating it in a single complex circuit.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The digital temperature compensation circuit utilizes parameter changes in the resonator's frequency characteristics based on temperature variations. By detecting temperature changes and adjusting compensation parameters accordingly, the system maintains frequency accuracy across different temperature conditions without requiring complex mechanical or physical adjustments.

Inventive Principle:
Principle #35Parameter changes

3Object-affected harmful factors

If an analog temperature compensation circuit is used to reduce noise interference, then noise levels are reduced, but the device complexity increases

Engineering Contradiction:
Improvenoise interferenceVSAvoiddevice complexity
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The analog temperature compensation circuit is merged with the existing temperature sensor and resonator system. By combining the temperature detection function with the analog compensation function in an integrated circuit architecture, the system reduces noise interference without proportionally increasing overall device complexity. The merged design allows shared components and streamlined signal paths.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively maintains frequency accuracy and reduces noise interference in the output clock signal, achieving improved frequency stability and reduced noise levels, even in the presence of temperature fluctuations and interference components.

Implementation Method 1

a resonator 105 that generates an output clock signal

Methodology Applied
Scientific EffectPiezoelectric effect: Piezoelectric Effect

Implementation Method 2

a temperature sensor 125 that generates an analog temperature signal according to a temperature

Methodology Applied
Scientific EffectTemperature sensing: Thermistor

Implementation Method 3

utilizes a phase-locked loop (PLL) to phase-lock an internal clock signal to the output clock signal

Methodology Applied
Scientific EffectPhase-locked loop: Feedback

Implementation Method 4

a low-pass filter (LPF) to maintain frequency stability across temperature changes, while also using an analog temperature compensation circuit to reduce noise interference

Methodology Applied
Scientific EffectLow-pass filtering: Filter (electronic)

Data Source

PatentUS20250350239A1Clock generation apparatus, clock generation method, adjustment apparatus, adjustment method, and non-transitory computer readable medium
Publication Date: 2025.11.13 ASAHI KASEI MICRODEVICES CORP
  • US20250350239A1 patent drawing
  • US20250350239A1 patent drawing
  • US20250350239A1 patent drawing

AI summary

Provided is a clock generation apparatus which generates an output clock signal, comprising: a first voltage-controlled oscillator which outputs the output clock signal; an AD converter which includes: a second voltage-controlled oscillator which outputs an internal clock signal phase-locked to the output clock signal in response to a digital temperature signal having become a value corresponding to an analog temperature signal from a temperature sensor; a phase comparator which detects a phase difference between the output clock signal and the internal clock signal; and a digital temperature signal generator which generates a digital temperature signal according to the phase difference detected by the phase comparator, to output it to the second voltage-controlled oscillator; and a digital temperature compensation circuit which compensates a frequency of the output clock signal of the first voltage-controlled oscillator by using the digital temperature signal.