Adaptive Clock Circuit for Process-Voltage-Temperature Variation

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Solution Overview

Problem

Digital integrated circuits face limitations in maximum workable frequency due to variations in manufacturing processes, working voltage, and temperature, leading to suboptimal performance and increased power consumption when operating under unfavorable conditions.

Innovation Solution

An adaptive clock circuit and method that adjusts the clock signal frequency in sync with changing working conditions, ensuring the adaptive clock driven circuit operates at a frequency close to its maximum workable frequency, optimizing performance and processing speed.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the working frequency is set to a conservative value to ensure stable operation under unfavorable parameters, then the reliability is improved, but the productivity is reduced

Engineering Contradiction:
Improvecircuit stabilityVSAvoidprocessing speed
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent implements dynamic frequency adjustment by monitoring circuit physical properties in real-time and adapting the clock frequency accordingly. The system transitions from a static conservative frequency setting to a dynamic adjustment mechanism that responds to actual circuit conditions, allowing the circuit to operate at optimal frequency under favorable conditions while maintaining stability under unfavorable conditions.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent employs feedback mechanisms by continuously monitoring circuit physical properties (such as delay characteristics) and using this information to adjust the clock frequency. The feedback loop compares actual circuit performance with target performance and modifies the operating frequency to maintain optimal operation, thereby resolving the contradiction between reliability and productivity.

Inventive Principle:
Principle #23Feedback

2Reliability

If the working frequency is set to a conservative value to ensure stable operation under unfavorable parameters, then the reliability is improved, but the use of energy is reduced

Engineering Contradiction:
Improvecircuit stabilityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The system dynamically adjusts clock frequency based on actual circuit conditions rather than operating at a fixed conservative frequency. When circuit conditions permit higher frequencies, the system increases the frequency to reduce power consumption while maintaining stability, thus resolving the contradiction between reliability and energy efficiency.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the operating frequency parameter dynamically based on monitored circuit physical properties. By adjusting this critical parameter in response to actual circuit behavior, the system achieves both reliability and energy efficiency, avoiding the excessive power consumption associated with always operating at maximum frequency.

Inventive Principle:
Principle #35Parameter changes

3Manufacturing precision

If the line width is decreased to increase integration density, then the manufacturing precision is improved, but the reliability deteriorates due to increased process randomness

Engineering Contradiction:
Improveline width controlVSAvoidcircuit performance consistency
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The patent uses feedback mechanisms to monitor circuit physical properties that are affected by manufacturing variations. By measuring actual circuit characteristics and adjusting operating parameters accordingly, the system compensates for process randomness and maintains reliable operation despite variations introduced by advanced manufacturing processes.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The system adjusts operating parameters (such as clock frequency and voltage) based on measured circuit physical properties to compensate for manufacturing variations. This dynamic parameter adjustment allows the circuit to maintain consistent performance across different manufacturing outcomes, resolving the reliability issue caused by process randomness.

Inventive Principle:
Principle #35Parameter changes

4Productivity

If the maximum workable frequency is increased to improve performance, then the productivity is improved, but the reliability deteriorates due to sensitivity to voltage and temperature changes

Engineering Contradiction:
Improveprocessing speedVSAvoidfrequency stability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent implements dynamic frequency adjustment that responds to actual circuit conditions including voltage and temperature. Rather than operating at a fixed high frequency that is sensitive to environmental changes, the system continuously adapts the frequency to maintain optimal performance while ensuring reliable operation under varying conditions.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system employs feedback mechanisms to monitor circuit physical properties and adjust the clock frequency accordingly. This feedback control allows the circuit to operate at high frequencies when conditions permit while automatically reducing frequency when voltage or temperature variations threaten stability, thus resolving the contradiction between productivity and reliability.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS8570087B2Circuitry for clock and method for providing clock signal
Publication Date: 2013.10.29 HUAWEI TECH CO LTD
  • US8570087B2 patent drawing
  • US8570087B2 patent drawing
  • US8570087B2 patent drawing

AI summary

The present invention provide a clock circuit and a method for providing a clock signal. The clock circuit includes: an adaptive clock generation circuit, configured to output an adaptive clock signal; and an adaptive clock driven circuit, configured to be driven by the adaptive clock signal to work. A maximum workable frequency of the adaptive clock driven circuit is higher than or equal to a frequency of the adaptive clock signal. When a working condition of the adaptive clock driven circuit is changed, the maximum workable frequency of the adaptive clock driven circuit is changed, the frequency of the adaptive clock signal which is output by the adaptive clock generation circuit is changed, and a changing direction of the frequency of an adaptive clock signal is consistent with that of the maximum workable frequency. The clock circuit and method may be used in design or manufacturing of a digital circuit.