Adaptive Clock Stretching for Integrated Circuit Voltage Droop
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Solution Overview
Problem
Integrated circuits face performance issues due to voltage droop, which existing solutions inadequately address by either increasing power supply or reducing clock frequency, leading to inefficiencies and instability.
Innovation Solution
The implementation of a power supply voltage monitoring circuit and a high-resolution adaptive clock stretching circuit that dynamically adjusts clock frequency by generating independent clock phases and filtering noise, allowing for precise control over clock stretching to compensate for voltage droop.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the clock frequency is reduced to compensate for voltage droop, then logic completion reliability is improved, but productivity deteriorates
Solution Approach 1:
The patent implements dynamic clock stretching where the clock period is extended only during specific cycles when voltage droop is detected, rather than maintaining a reduced clock frequency continuously. The clock stretch control circuit dynamically adjusts the clock period based on real-time voltage monitoring, allowing the system to maintain high productivity during normal operation while ensuring logic completion reliability during voltage droop events.
Solution Approach 2:
The system changes the clock period parameter dynamically in response to voltage droop detection. When voltage droop is detected, the clock stretch control circuit modifies the clock period to provide additional time for logic completion, then returns to the original clock period once voltage stabilizes. This parameter change approach allows the system to maintain high average productivity while ensuring reliability during critical moments.
2Reliability
If power supply voltage is increased to compensate for voltage droop, then logic completion reliability is improved, but use of energy worsens
Solution Approach 1:
The patent extracts the voltage compensation function from the power supply system and implements it through clock stretching instead. Rather than increasing power supply voltage to compensate for droop, the system detects voltage droop and compensates by extending the clock period, thereby eliminating the need for additional power consumption while maintaining logic completion reliability.
Solution Approach 2:
The system replaces the electrical approach (increasing power supply voltage) with a temporal approach (extending clock period). The clock stretch control circuit substitutes the mechanical/electrical power supply adjustment with a timing-based compensation mechanism, achieving the same reliability goal without the associated energy penalty.
3Device complexity
If a simple voltage monitoring approach is used, then device complexity is reduced, but measurement precision deteriorates
Solution Approach 1:
The voltage monitoring function is segmented into multiple independent delay chains with different delay characteristics. Each delay chain monitors voltage droop from a different perspective, and their combined output provides precise voltage droop detection. This segmentation allows the system to achieve high measurement precision while keeping each individual monitoring element simple.
Solution Approach 2:
The patent merges the outputs of multiple simple delay chains to achieve precise voltage droop detection. By combining the monitoring results from multiple independent chains with different delay characteristics, the system achieves high measurement precision without requiring any single complex monitoring circuit.
4Reliability
If clock stretching is applied continuously to ensure logic completion, then reliability is improved, but loss of time worsens
Solution Approach 1:
The patent implements periodic voltage monitoring and selective clock stretching rather than continuous clock stretching. The system monitors voltage at specific intervals and applies clock stretching only during cycles when voltage droop is detected. This periodic approach ensures logic completion reliability during critical moments while minimizing overall time loss by maintaining normal clock operation during stable voltage conditions.
Data Source
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AI summary
An integrated circuit and method are described for compensating for voltage droop on an integrated circuit using a power supply voltage monitoring circuit and a high resolution adaptive clock stretching circuit. In some example embodiments, the method includes monitoring (602) power supply voltage on an integrated circuit, detecting (604) a voltage droop such as a dynamic loss of power supply in the integrated circuit, and stretching (606) a current clock cycle, according to the detected voltage droop, to provide more time for logic on the integrated circuit to complete before a next clock cycle.