Amplitude-Adaptive DAC Bias Switching for Low-Power Linearity

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Solution Overview

Problem

Current digital-to-analog converters (DACs) face high power consumption due to all current units being active regardless of signal amplitude, leading to increased jitter and nonlinearity issues.

Innovation Solution

A digital-to-analog conversion circuit with a signal amplitude detector and controller that adjusts the operation of current modules based on signal amplitude, allowing only necessary current modules to operate, thereby reducing power consumption and minimizing jitter and nonlinearity by switching bias voltages between different bias circuits.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If all current units are kept active to avoid jitter and nonlinearity, then the DAC maintains high precision and stability, but power consumption increases significantly

Engineering Contradiction:
ImproveDAC precision and stabilityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent implements dynamic control of current units based on signal amplitude detection. The system transitions from a static state where all current units are continuously active to a dynamic state where the number of active current units adjusts according to the actual signal requirements. This resolves the contradiction by making the system adaptive: during low signal amplitude periods, fewer current units are activated, reducing power consumption while maintaining sufficient precision; during high signal amplitude periods, more current units are activated to maintain accuracy, thus achieving both energy efficiency and reliability.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the operational parameter (number of active current units) based on signal amplitude conditions. By detecting signal amplitude and dynamically adjusting which current units are activated, the system optimizes the balance between power consumption and conversion precision. This parameter adjustment strategy allows the DAC to consume less power during low-activity periods while maintaining high precision when needed, effectively resolving the technical contradiction.

Inventive Principle:
Principle #35Parameter changes

2Use of energy by moving object

If signal amplitude detection and dynamic control mechanisms are added, then power consumption is reduced, but device complexity increases

Engineering Contradiction:
Improvepower consumptionVSAvoidcircuit structure complexity
Core Design Contradiction:
Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The patent integrates multiple functions into existing circuit components to minimize added complexity. The amplitude detection mechanism leverages existing signal paths, and the control logic reuses available circuit resources. By making existing components multi-functional (serving both their original purposes and new amplitude-based control functions), the patent reduces power consumption without proportionally increasing device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The system employs self-service mechanisms where the DAC circuit monitors its own operating conditions and automatically adjusts its power consumption accordingly. The amplitude detection and control logic are embedded within the existing DAC architecture, allowing the system to self-regulate power usage based on actual signal requirements without requiring external complex control systems, thus limiting the increase in overall device complexity.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS10608653B2Digital-to-analog conversion circuit
Publication Date: 2020.03.31 HUAWEI TECH CO LTD
  • US10608653B2 patent drawing
  • US10608653B2 patent drawing
  • US10608653B2 patent drawing

AI summary

Embodiments of the present invention provide a digital-to-analog conversion circuit, where the digital-to-analog conversion circuit includes a signal amplitude detector and a digital-to-analog converter. When the signal amplitude detector detects a low signal amplitude, a first current module in the digital-to-analog converter operates normally and a second current module in the digital-to-analog converter stops operating. In addition, when stopping operating, the second current module is in a state of a third bias voltage and a fourth bias voltage that are generated by a second bias circuit. When the amplitude detector detects a high signal amplitude subsequently, the second current module resumes normal operation. After operating normally, the second current module switches back to a first bias voltage and a second bias voltage that are generated by a first bias circuit. This reduces a nonlinearity problem caused before a second current module resumes normal operation.