Adaptive DEM Offset Circuit for Accurate Low-Side Switch Termination
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Solution Overview
Problem
Conventional diode emulation mode (DEM) circuitry in switching regulators struggles with inaccurate timing due to system parameters, leading to increased power dissipation and efficiency losses under light-load conditions.
Innovation Solution
An adaptive diode emulation mode (DEM) offset circuit that includes a polarity detection circuit and an adaptive DEM offset circuit to detect early or late terminations of the low-side gate drive, outputting an offset voltage to adjust the termination time accurately, thereby mitigating inefficiencies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional DEM circuitry is used to prevent reverse current flow, then reverse current is blocked, but timing accuracy deteriorates due to system parameter variations
Solution Approach 1:
The patent implements dynamic adjustment of the DEM threshold voltage based on detected termination timing errors. The circuit transitions from a fixed threshold to a dynamically adaptable threshold that shifts according to actual performance, resolving the contradiction between reliable reverse current blocking and accurate timing by making the blocking characteristic adaptive rather than static
Solution Approach 2:
The patent employs feedback mechanisms where the actual termination timing is detected and used to adjust the DEM threshold voltage for subsequent cycles. This closed-loop approach allows the circuit to learn from timing errors and self-correct, simultaneously achieving reliable reverse current prevention and improved timing accuracy through iterative optimization
2Reliability
If DEM circuitry terminates the low-side power switch early to prevent reverse current, then reverse current is prevented, but power dissipation increases due to inaccurate timing
Solution Approach 1:
The patent dynamically adjusts the DEM threshold voltage to optimize the trade-off between reverse current prevention and power dissipation. By making the threshold adaptive rather than fixed, the circuit can prevent reverse current while minimizing unnecessary early termination that would increase power loss, thus resolving the contradiction between reliability and energy efficiency
Solution Approach 2:
The patent changes the voltage threshold parameter dynamically based on operating conditions and detected timing errors. This parameter adjustment allows the circuit to maintain reliable reverse current blocking while optimizing the termination timing to reduce power dissipation, resolving the contradiction between prevention reliability and energy loss
3Device complexity
If a fixed DEM threshold is used, then circuit complexity is reduced, but performance consistency deteriorates across different operating conditions
Solution Approach 1:
The patent introduces dynamic adaptability through automated threshold adjustment mechanisms while maintaining a relatively simple overall circuit structure. The added complexity is focused specifically on the adaptive threshold generation, allowing the circuit to maintain performance consistency across different operating conditions without requiring complete redesign of the entire DEM circuit
Solution Approach 2:
The patent implements self-adjusting capabilities where the DEM circuit automatically detects timing errors and adjusts its own threshold voltage without external intervention. This self-service approach improves performance consistency across varying conditions while minimizing the need for external control circuitry, effectively balancing complexity and adaptability
Data Source
AI summary
An apparatus and method for an adaptive diode emulation mode offset circuit is disclosed. The apparatus includes a polarity detection circuit to identify the polarity of a phase node of a DC-DC converter; and an adaptive diode emulation mode (DEM) offset circuit to: detect a first early termination or a first late termination of an on time of a low-side gate drive of the DC-DC converter based on the identified polarity of the phase node; and output an offset voltage to selectively terminate on time of the low-side gate drive to mitigate a second early termination or a second late termination of the low-side gate drive, a value of the offset voltage based on a polarity of the phase node of the DC-DC converter; wherein the second early termination occurs after the first early termination and the second late termination occurs after the first late termination.