Dc-Dc Conversion TRIZ Cases

A filtered voltage compensation path smooths PFM mode transitions in power converters, cutting switching losses and limiting overshoot.

A two-phase buffer samples offset on a capacitor, then feeds back a corrected reference voltage with low error and high bandwidth for converters.

When MMC spare submodules are exhausted, DC link and submodule voltage reduction keeps converter arms balanced and HVDC operation continuous.

Adapting the PFM timer reference to inductor ripple keeps converter loop gain stable, cutting ripple and mode bouncing during PWM-PFM transitions.

A non-isolated single-stage buck-boost charger combines AC-DC conversion and input PFC to charge batteries with lower cost and higher efficiency.

Grid-phase sampling and power compensation speed MPPT convergence in a unipolar inverter while reducing calculation load and energy loss.

Dark-current feedback lets a microcontroller tune SiPM bias voltage with lower power use and built-in temperature compensation.

A secondary-side phase cancels TLVR core DC flux, enabling smaller inductors or higher inductance for lower switching loss and better density.

Parallel isolating elements and fault latching keep vehicle control pulse signals valid even when one transmission path fails.

A VCO-based primary-side control shifts switching frequency with input voltage to sustain low-line power and limit over-power during faults.

A low-voltage optocoupler trigger stops an isolated LED power supply during micro short circuits to prevent fire and device damage.

Phase-node voltage timing lets a switching regulator hit ZVS under light load while keeping operation within a tolerable frequency range.

An open-loop DAC dummy current keeps boost PFM switching above the audible band, cutting buzz, simplifying control, and improving SNR.

Closed-loop scaling correction aligns high-side and low-side current sensing to remove phase-transition discontinuities in switching converters.

Dynamic threshold detection and high-side switch pull-down suppress input overvoltage caused by output voltage drops in power converters.

Two interleaved inverting boost stages raise DC voltage while cutting input current ripple, switch stress, and parasitic efficiency loss.

Independent phase extrapolators and a selector multiplexer keep converter clocks accurately spaced, reducing ripple and stabilizing power regulation.

Shared ion implantation and etching form upper and lower NMOS gates together, cutting half-bridge manufacturing cost and complexity.

Pulse-encoded transformer isolation sends both gate-drive power and control states, cutting board area and extra isolated supply circuits.

Polarity-based DEM offset control corrects early or late low-side switch termination to cut DC-DC converter power loss under light loads.

Dynamic slope compensation smooths PCM-PFM transitions in buck converters, cutting switching jitter and output voltage ripple at light load.

Dynamic gate-driver current profiles shape half-bridge switching to cut electromagnetic emissions while limiting converter power loss.

Opposite-direction secondary winding current cancels DC bias flux in TLVR cores, enabling smaller inductors or lower switching frequency.

A regulator circuit corrects gate drive voltage to offset back-body effects, preserving switch impedance matching and DAC linearity.

Analog phase-shifted branch control replaces digital timing in multi-phase converters, improving stability and ripple handling in harsh environments.

Bidirectional coil energy reset and timed switch control cut heat and power loss in high-voltage switching circuits across wide input ranges.

Shared bus capacitors and parallel DC/DC balancing help this modular multilevel converter stabilize output voltage with lower circuit volume and power use.

Separated DC terminals and a three-level switching strategy suppress leakage currents while maintaining stable AC output across a wide input range.

Input-voltage feedforward keeps ramp amplitude stable while lowering common-mode voltage headroom limits in high-duty power converters.

A voltage detector and charging current generator keep PWM controller VDD stable during no-load and dynamic operation while limiting chip power use.

Concurrent startup switching keeps inrush current from saturating the interphase transformer before phase shift returns to interleaved operation.

Selective IC temperature reporting lets a multi-phase converter monitor each phase separately for thermal balance and health checks without extra pins.

An integrated startup and clamp-sensing circuit helps flyback converters handle 1000V+ input, cut die area, and reduce switching loss.

Controlled initial charging lets a low-voltage capacitor stabilize buck output, cut chip area, and provide emergency power during outages.

Timing-based MOSFET off-time control regulates multichannel buck LED current precisely at low dimming levels while reducing noise and flicker.

Ground-referenced RC current sensing and zeroing improve peak current control in high-voltage LED buck converters while cutting switching losses.

Measures Miller plateau duration to infer FET switch voltage, cutting PCB components while improving zero-voltage switching control.

Automatic buck, boost, and buck-boost mode switching prevents dead-zone pulse skipping and lowers coil current ripple for stable conversion.

Dynamic current determination and duty control stabilize AMOLED supply voltage during input disturbances, minimizing overshoot and undershoot.

A single level shifter and drive-strength control circuit tune high-side switching under heavy loads to cut ringing, damage, and area.

A single comparator with dynamic thresholds shifts a power converter from low-power to high-power mode while limiting overshoot and undershoot.

Two capacitors sample peak and valley output voltage, then share charge to estimate average inductor current without lossy sensing or filter delay.

A resistor-network charging path precharges the bootstrap capacitor to reduce transformer saturation and primary-side voltage stress.

Comparator timing during switch conduction enables smooth pulse-skipping to continuous-mode transitions, reducing output oscillation and energy loss.

An auxiliary switch detection circuit lets the inverter track junction box state and switch between grid and off-grid modes within 15 ms.

Recycled optocoupler current powers the operating circuit in an isolated converter, cutting light-load power loss and improving efficiency.

Dual step-down paths, a step-up stage, capacitor, and diodes maintain memory write voltage during input fluctuations while reducing power use.

Periodic refresh clock pulses recharge bootstrap capacitors in pass-through mode, preventing undervoltage protection and abnormal converter operation.

A gap between the resin and magnetic body absorbs thermal expansion, preventing cracks and helping keep inductance stable.

Battery-voltage threshold control shifts a converter between pass-through and switching modes to reduce switching losses and extend battery life.

Auxiliary stage injects current during boost on-time to correct output voltage deviations and reduce load transient response time.

A SIMO DC-DC converter uses a switch controller to manage inductor energy storage and output switching for multi-output voltage generation.

A switching regulator uses a frequency limitation circuit to enforce minimum off times for the power switch.

A rectangular-wave-signal generating circuit synchronizes a sawtooth wave with a clock signal to produce stable PWM output.

Full-bridge power converter segments voltage into three levels using periodic switching to inhibit ripple current, reducing smoothing capacitor size.

A stabilivolt diode and RCD circuit divide spike voltage across switching transistors to reduce component stress.

A current command compensating unit adjusts output current commands based on detected voltage levels to maintain even power distribution among parallel inverters.

A cycle skipping prevent circuit uses a latch and oscillator to maintain consistent switching intervals in DC-to-DC converters.

A power conversion device uses a shared bridge circuit and transformer to exchange power among multiple electric devices.

A digital current equalization bus transmits variable frequency pulses between parallel power supply modules to balance output currents.

A primary side regulation circuit adjusts transformer current levels using a regulating controller to deliver power efficiently.

A digital control circuit stores duty cycle values in memory to regulate switched mode power supply output voltage.

Clock signal generator drives input offset eliminator to remove operational amplifier offset, enabling fast response in standard CMOS processes.

A multi-phase switched mode programmable load uses interleaved boost regulators to cancel ripple current and reduce input noise.

Maximum load current controller determines idle periods in active cycles to limit power switches.

Negative feedback in a DC-pulse voltage converter suppresses pulsation, resolving the trade-off between stability and device complexity.

Segmented current loop in metal housing cancels induced noise currents from AC magnetic fields.

A switching regulator circuit enables 100 percent duty cycle operation through dynamic mode transitions between PWM and continuous conduction states.

Parallel unit integrated voltage regulators reduce mask costs and design time by enabling multiple power specifications with a single fabrication set.

Dynamic mode switching maintains high conversion efficiency when input voltage approaches output voltage.

Parallel MOSFET redirects circulation current during switch off-state, reducing flywheel diode heat generation and improving torque conversion.

Intermediary RC networks transform low-DCR inductor current into accurate voltage feedback, eliminating complex tuning requirements.

Segmented AC and DC sampling captures voltage during conduction and off-state to resolve oscillation interference without extending blanking time.

Active wire compensation circuit modulates output voltage detecting signal via compensating current to stabilize load voltage without remote sensing wires.

A voltage boosting circuit adjusts switch timing via duty detection to reduce internal losses during load current changes.

Replacing the ripple generator with a fixed on-time control mechanism reduces circuit complexity and current consumption while improving noise resistance.

Dynamic clocking pulse width selection prevents sub-harmonic oscillations and minimizes output voltage ripple in buck converters.

A starting voltage module uses a step-down converter to regulate starter voltage from the vehicle supply.

A gain adjustment circuit dynamically modifies feedback signal gain to maintain stability across multiple output voltage levels.

Parallel boosting circuits adjust active units based on selection signals to reduce ripple in NAND flash memory write operations.

A single-cycle charge regulator adjusts duty-cycle within one switching cycle to correct output voltage deviations.

Assigning dual functionality to the PWM controller feedback pin reduces IC pin count by controlling an external HV startup transistor during initialization.

A quasi-Z source inverter control method determines shoot-through periods to boost DC voltage without a front-end DC/DC circuit.

An integrated overcurrent protection circuit generates a sense voltage from an output transistor on-current to perform pulse-by-pulse and timer latch operations.

A digital VR controller enables individual phase current sense calibration through a rotating single-phase operation mode.

A power supply controller selects variable frequency reference signals to adapt switching speed for load changes.

Shared bridge arms in this multi-input power converter reduce component power ratings while enabling simultaneous AC and battery supply.

Segmented down converters with stacked switching elements reduce resistive losses and heat generation in high-frequency integrated circuits.

A voltage regulator detects inductor presence via output current resistance to switch between buck and linear modes.

Segmented converting stages in a switching regulator select appropriate dynamic voltage scaling rates to reduce power loss under varying load conditions.

A DC-DC converter adjusts the slew rate of its switch voltage using segmented resistors to mitigate broadband power noise without sacrificing efficiency.

A clamp circuit uses a source-follower to stabilize reference voltage generation.

A buck-boost converter control circuit manages mode transitions through a four-state machine and pulse width timers.

A semiconductor device integrates a very resistive element with high breakdown voltage directly into the substrate to detect input signals.

A democratic interleaving modulator determines phase turn-on sequences using control voltages to maintain current balance.

A 3-state buck-boost PWM control architecture manages inductor current through an intermediate switching state.