Cycle Skipping Prevent Circuit for DC-DC Converter Noise Reduction

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Solution Overview

Problem

DC-to-DC converters employing peak and valley current mode control often experience cycle skipping issues due to sudden changes in load, leading to undesirable noise generation in the AM frequency band, particularly in automotive applications.

Innovation Solution

A cycle skipping prevent circuit is introduced, which includes a latch, comparator, and oscillator circuit, ensuring the latch is reset or set at regular intervals by gating signals based on the transition of error and compensated error voltage signals, thereby preventing cycle skipping and minimizing noise generation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If peak or valley current mode control is used in DC-to-DC converters, then the converter can efficiently regulate voltage, but cycle skipping occurs during sudden load changes causing noise in the AM frequency band

Engineering Contradiction:
Improvevoltage regulation efficiencyVSAvoidnoise generation in AM frequency band
Core Design Contradiction:
ProductivityVSObject-generated harmful factors

Solution Approach 1:

The oscillator circuit generates a periodic signal that preemptively triggers the latch to reset or set at regular intervals, preventing cycle skipping before it can occur during load transitions. This preliminary action ensures continuous switching cycles even when load conditions would normally cause the converter to skip cycles.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The oscillator circuit provides a periodic trigger signal that forces the latch to transition at regular intervals, creating a consistent switching rhythm. This periodic action overrides the irregular switching patterns that cause cycle skipping and associated noise, maintaining stable operation during load changes.

Inventive Principle:
Principle #19Periodic action

2Adaptability or versatility

If the latch is allowed to skip cycles during load changes, then the converter adapts to load conditions, but undesirable noise is generated in the AM frequency band

Engineering Contradiction:
Improveload adaptation capabilityVSAvoidnoise in AM frequency band
Core Design Contradiction:
Adaptability or versatilityVSObject-generated harmful factors

Solution Approach 1:

The comparator circuit continuously monitors the relationship between the current sense voltage and compensated error voltage, providing feedback that triggers the latch to reset or set. This feedback mechanism ensures the converter responds appropriately to load conditions while maintaining regular switching cycles through the oscillator's periodic influence, preventing noise-generating cycle skipping.

Inventive Principle:
Principle #23Feedback

3Reliability

If the oscillator signal has a small duty cycle with constant frequency, then cycle skipping is prevented, but the circuit complexity increases

Engineering Contradiction:
Improveoperational stabilityVSAvoidcircuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The oscillator, comparator, and latch are integrated into a unified control circuit where the oscillator's periodic signal combines with the comparator's feedback signal to control the latch. This merging of functions achieves reliable cycle skipping prevention while minimizing circuit complexity through shared components and coordinated operation.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS20190207516A1Cycle skipping prevent circuit in a regulator of a DC-to-DC converter
Publication Date: 2019.07.04 QORVO INT PTE LTD
  • US20190207516A1 patent drawing
  • US20190207516A1 patent drawing
  • US20190207516A1 patent drawing

AI summary

A DC-to-DC converter employs peak current mode control and includes a cycle skipping prevent circuit. If a latch is set, then a high side switch is turned on. A comparator receives a signal indicative of current flow and a compensated error signal. The prevent circuit supplies a delayed version of a low duty cycle, fixed frequency, oscillator signal onto the set input lead of the latch. The prevent circuit gates a high signal as output by the comparator onto the reset input lead of the latch. If the output of the comparator has, however, not transitioned high by a predetermined time, then the prevent circuit gates a high pulse onto the reset input lead. Accordingly, the prevent circuit ensures that the latch is reset once every period of the signal SET. A cycle skipping prevent circuit is also disclosed for use in a converter that employs valley current mode control.