Digital Current Equalization Bus for Parallel Power Supply Modules
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Solution Overview
Problem
Existing digital current equalization methods require customized chips, leading to high costs and limited universality, and are prone to errors due to ground potential differences and electromagnetic interference.
Innovation Solution
A digital current equalization method that uses a pulse frequency modulation (PFM) generator, counter preset value loading module, phase inverter, and microcontroller to generate and transmit continuous variable frequency pulses over a digital current equalization bus, allowing for current equalization between power supply modules without a customized chip, by adjusting output currents based on synchronized frequency counts.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If analog current equalization is used, then current equalization control can be implemented, but ground potential difference and electromagnetic interference affect equalization accuracy
Solution Approach 1:
The patent replaces the analog current equalization method with a digital current equalization method. Instead of using analog signals that are susceptible to ground potential differences and electromagnetic interference, the invention uses digital signals (0 and 1) for current information transmission. This substitution of analog system with digital system eliminates the harmful effects of ground potential differences and electromagnetic interference on measurement precision.
2Object-affected harmful factors
If digital current equalization with customized chip is used, then anti-electromagnetic interference capability is improved, but cost and universality are reduced
Solution Approach 1:
The patent achieves digital current equalization using standard microcontroller units (MCUs) that can perform multiple functions, including pulse frequency modulation, counting, and digital signal transmission. By making the MCU perform multiple functions that would otherwise require dedicated customized chips, the invention maintains electromagnetic interference resistance while improving universality and reducing cost.
Solution Approach 2:
The invention enables the standard MCU to serve itself by using its built-in resources (timers, counters, communication interfaces) to implement digital current equalization functionality. This self-service approach eliminates the need for external customized chips, thereby reducing cost and improving universality while maintaining the anti-electromagnetic interference capability of digital signaling.
3Reliability
If multiple power supply modules are connected in parallel for hot standby, then system reliability is improved, but output power distribution becomes uneven
Solution Approach 1:
The patent implements a feedback mechanism where each power supply module's current output is converted to a pulse frequency signal, transmitted digitally to other modules, and used to adjust their operating states. This feedback loop enables automatic load sharing and ensures uneven power distribution is corrected, allowing multiple modules to operate in parallel with improved reliability and balanced power distribution.
Data Source
AI summary
A digital current equalization method includes: acquiring a current value from a counter preset value loading module in each synchronization period; generating a continuous variable frequency pulse according to the current value, and receiving a synchronization signal transmitted by a phase inverter connected to the PFM generator; transmitting, according to the synchronization signal, the continuous variable frequency pulse to the digital current equalization bus through an OC gate of a triode connected to the PFM generator; counting a frequency of the continuous variable frequency pulse on the digital current equalization bus, where an acquired frequency count value is used to represent a current magnitude of a power supply module, which currently outputs a greatest current, of the foregoing power supply module and a power supply module connected in parallel with the foregoing power supply module to accordingly adjust the output current of the foregoing power supply module.


