Adaptive ECC Coverage in Memory Arrays for Variable Error Rates
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Solution Overview
Problem
Modern memory devices face increased error rates due to smaller feature sizes, higher array densities, and increased usage, leading to inefficiencies in error correction and unrecoverable data errors, as existing ECC codes are limited by storage space and complexity, and are typically applied on a per-sector basis without adapting to varying error rates across different memory areas.
Innovation Solution
The solution involves decoupling user data structures from ECC data size and algorithm, allowing for variable ECC block sizes and encoding schemes to be selected based on application needs, increasing the ECC coverage area to detect and correct more errors while maintaining equivalent ECC code storage, and adapting ECC algorithms and encoding schemes to match the specific error rates and requirements of different memory areas.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If ECC codes are applied on a per-sector basis with fixed block sizes, then the implementation is simple and storage space is predictable, but the error correction capability is limited and cannot adapt to varying error rates across different memory areas
Solution Approach 1:
The patent implements dynamic ECC by allowing the ECC coverage area to be variable rather than fixed. The system can adjust the size of the ECC coverage area and select different ECC algorithms based on the actual error conditions detected in different memory areas, making the error correction capability adaptive to varying error rates across the memory device.
Solution Approach 2:
The patent changes the parameters of the ECC system by allowing variable ECC coverage areas and selecting from multiple ECC algorithms with different strengths. This enables the system to optimize error correction capability by matching the ECC parameters to the actual error conditions in different memory regions.
2Reliability
If the ECC coverage area is increased to detect and correct more errors, then the error detection and correction capability is enhanced, but the ECC code storage space and processing complexity increase
Solution Approach 1:
The patent segments the memory device into multiple areas with different error characteristics and applies appropriate ECC coverage to each segment. This allows the system to enhance error correction capability in high-error areas without unnecessarily increasing ECC overhead across the entire memory device, thus managing complexity efficiently.
Solution Approach 2:
The patent applies different ECC coverage strategies to different local areas of the memory device based on their specific error rates and characteristics. High-error areas receive enhanced ECC coverage while low-error areas use standard coverage, optimizing the balance between error correction capability and resource usage.
3Reliability
If larger ECC coverage areas are used to average bit errors over larger data areas, then more errors can be corrected within the same storage space, but the processing time and computational overhead increase
Solution Approach 1:
The patent implements dynamic selection of ECC coverage areas based on detected error patterns. When high error rates are detected in a particular area, the system expands the ECC coverage to include additional sectors for better error averaging. When error rates are low, the system reduces coverage to minimize processing overhead, thus dynamically balancing reliability and processing time.
4Ease of manufacture
If fixed ECC algorithms are used, then the implementation is straightforward and hardware requirements are minimal, but the system cannot adapt to different error patterns and memory conditions
Solution Approach 1:
The patent implements a universal ECC system that can handle multiple error patterns and memory conditions by supporting multiple ECC algorithms. The system can select from different algorithms (such as BCH, Reed-Solomon, or Hamming codes) depending on the detected error characteristics, making the ECC subsystem multi-functional and adaptable while maintaining a unified control structure.
Data Source
AI summary
Memory devices and systems having an array of memory cells arranged in a plurality of sectors and a plurality of ECC coverage areas, and control circuitry configured to adjust a size of one or more of the ECC coverage areas.