Adaptive Semiconductor Memory Bank Capacity Expansion
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Solution Overview
Problem
Existing semiconductor memory devices face limitations in expanding storage capacity due to standardized package sizes and operating conditions, which restrict the adaptive expansion of bank capacity.
Innovation Solution
The semiconductor memory device incorporates n physical banks, each configurable to be entirely or partially included in one of two logic banks, arranged in a row direction, with the proportion of the sum of their widths to their height being a real number multiple not divisible by 2, allowing for adaptive capacity expansion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the number of physical banks is increased to expand storage capacity, then the storage capacity is improved, but the package size and operating condition compliance deteriorate
Solution Approach 1:
The invention divides physical banks into multiple sub-banks (e.g., first sub-bank and second sub-bank) that can be independently configured and assigned to different logic banks. This segmentation allows flexible arrangement of bank resources to achieve desired storage capacity while maintaining package size compliance through optimized spatial distribution of memory cells and peripheral circuits.
Solution Approach 2:
The invention implements dynamic configurability where physical banks can be entirely or partially included in different logic banks based on operational requirements. This dynamic assignment allows the system to adaptively expand storage capacity by reconfiguring bank assignments without requiring physical changes to the package structure, thereby maintaining compliance with standardized package dimensions.
2Quantity of substance
If the area for memory cells is expanded to increase storage capacity, then the storage capacity is improved, but the peripheral circuit area is reduced
Solution Approach 1:
The invention applies different functional qualities to different regions of the semiconductor device. Memory cell regions are optimized for high-density storage with larger area allocation, while peripheral circuit regions are strategically positioned and sized to provide necessary control functions. This local differentiation allows maximum memory capacity within the constraints of required peripheral circuit functionality.
Solution Approach 2:
The invention utilizes three-dimensional stacking arrangements where memory banks are organized in multiple layers or levels. By transitioning from a two-dimensional planar layout to a three-dimensional structure, the system can increase storage capacity without proportionally increasing the footprint area occupied by peripheral circuits, effectively decoupling capacity expansion from peripheral circuit area reduction.
3Quantity of substance
If the number of logic banks is increased to expand capacity, then the storage capacity is improved, but the device complexity increases
Solution Approach 1:
The invention creates universal logic bank structures that can accommodate multiple physical banks and sub-banks through standardized interfaces and control mechanisms. Each logic bank is designed with multi-functional capabilities to handle different types of memory operations and configurations, reducing the need for specialized complex control logic for each individual bank and thereby managing overall device complexity.
Data Source
AI summary
A semiconductor memory device includes n physical banks, each of which is configured to be entirely or partially included in one of a first logic bank or a second logic bank and arranged in a row direction, wherein n is an integer that is greater than or equal to 3, and wherein a proportion of a sum of respective widths of the n physical banks in the row direction to a height of the n physical banks in a column direction is a real number multiple that is not a multiple of 2.