Adaptive Memory Drive Circuit for Phase Change Memories

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Solution Overview

Problem

Conventional memory drive circuits are unable to adaptively adjust the voltage/current for phase change memories due to differences in their characteristics, limiting their effectiveness in memristive memory technologies.

Innovation Solution

A memory drive device comprising a first switch, a voltage setting circuit, a bias control circuit, and a configuration setting terminal, where the bias control circuit includes a variable resistor element, a voltage amplifier, and a resistor/capacitor element to continuously detect and adjust the voltage/current based on the characteristics of each phase change memory unit.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If a conventional memory drive circuit is used, then the circuit structure is simple, but it cannot adaptively adjust the voltage/current for phase change memories with different characteristics

Engineering Contradiction:
Improveadaptive adjustment capabilityVSAvoidcircuit structure
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent implements a feedback mechanism where the bias control circuit continuously detects the voltage at the first node and adjusts the bias signal to control the first switch, thereby adaptively adjusting the setting current based on the actual characteristics of each phase change memory unit

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent introduces dynamic adjustment capabilities through variable resistor elements and bias control circuits that can continuously modify the voltage and current parameters during operation, transforming the static conventional drive circuit into a dynamic adaptive system

Inventive Principle:
Principle #15Dynamics

2Adaptability or versatility

If the drive circuit is designed to adaptively adjust voltage/current for each phase change memory, then the adaptability is improved, but the device complexity increases

Engineering Contradiction:
Improvevoltage/current adjustment adaptabilityVSAvoiddrive circuit structure
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The bias control circuit is designed to serve multiple phase change memory units with different characteristics through a universal adaptive control mechanism, where the same circuit structure can adjust parameters for different memory units without requiring dedicated circuits for each unit

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent introduces intermediate control elements such as bias control circuits and variable resistor elements that act as mediators between the power supply and the phase change memory units, enabling adaptive adjustment without directly modifying each memory unit

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Enables adaptive adjustment of the driving operation voltage/current for phase change memories, improving their performance by matching the drive circuit to the specific characteristics of each memory unit.

Implementation Method 1

adjust a resistance value of the variable resistor element to adjust a value of the bias signal correspondingly

Methodology Applied
Scientific EffectElectrical Resistance: Electrical Resistance

Data Source

PatentUS11257542B2Memory driving device
Publication Date: 2022.02.22 JIANGSU ADVANCED MEMORY TECH CO LTD
  • US11257542B2 patent drawing
  • US11257542B2 patent drawing
  • US11257542B2 patent drawing

AI summary

A memory driving device, comprising a switch, a voltage setting circuit, and a bias control circuit. The switch is coupled to a memory at a node. The voltage setting circuit is coupled to the switch and configured to provide a set signal during a first period to turn on the switch, so as to generate current flowing through the switch to the memory unit. The bias control circuit is respectively coupled to the switch and the node, and, during a second period, continuously provides a bias signal to control the switch so as to adaptively adjust a value of the setting current of the switch. The configuration setting terminal is coupled to the voltage setting circuit and the bias control circuit to control the first and the second period.