Adaptive Memory Error Scrubbing for Row Hammer Mitigation

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Solution Overview

Problem

Existing memory systems face limitations in effectively addressing row hammer attacks, particularly row fuzzing attacks, which exploit multiple target rows, and traditional monitoring mechanisms are inadequate in identifying these conditions, leading to increased uncorrectable errors.

Innovation Solution

An adaptive error scrubbing system on-memory with error checking and scrubbing (ECS) logic that adjusts scrubbing rates and targets based on real-time error detection, including host hints and environmental conditions, to mitigate row hammer faults and reduce uncorrectable errors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If traditional patrol scrubbing is used with a single configuration, then the system can maintain basic error correction, but it cannot adapt to changing error patterns or row hammer attacks

Engineering Contradiction:
Improveadaptability to error patternsVSAvoidscrubbing system complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The scrubbing system dynamically adjusts its operation mode between patrol scrubbing and targeted scrubbing based on real-time error detection. The system transitions from a static single-configuration approach to a dynamic multi-mode system that adapts to changing error patterns, row hammer attacks, and environmental conditions through continuous monitoring and adaptive response

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The memory device performs self-diagnostics by monitoring its own error patterns and automatically adjusts scrubbing operations without external intervention. The system uses internal error detection mechanisms to identify problematic rows and autonomously initiates targeted scrubbing operations on affected memory regions

Inventive Principle:
Principle #25Self-service

2Measurement precision

If monitoring mechanisms are added to detect row hammer conditions, then detection capability improves, but the system becomes vulnerable to row fuzzing attacks that access multiple target rows

Engineering Contradiction:
Improverow hammer detection precisionVSAvoidprotection against row fuzzing
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The monitoring system segments the memory space into individual monitorable rows, allowing precise tracking of access patterns to each row. This granular monitoring enables the system to detect both traditional single-target row hammer attacks and more sophisticated multi-target row fuzzing attacks by analyzing access patterns across multiple rows independently

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The monitoring mechanism is designed to detect multiple types of row hammer attacks universally, not just single-target attacks. The same monitoring infrastructure handles both traditional row hammer conditions and row fuzzing attacks, providing comprehensive protection through a unified detection system

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If the entire system address space is scrubbed periodically, then all memory locations are covered, but the scrubbing operation takes too long and may miss time-sensitive errors

Engineering Contradiction:
Improveerror detection coverageVSAvoidscrubbing operation time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The scrubbing operation is segmented into patrol scrubbing of the entire address space and targeted scrubbing of specific problematic regions. This segmentation allows the system to maintain comprehensive coverage through periodic patrol operations while rapidly responding to time-sensitive errors through focused targeted scrubbing of identified problematic rows and memory regions

Inventive Principle:
Principle #1Segmentation

4Reliability

If on-memory ECC and error scrubbing mechanisms are implemented, then error correction capability improves, but the system remains vulnerable to newer row hammer attack vectors

Engineering Contradiction:
Improveerror correction capabilityVSAvoidrow hammer attack vulnerability
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The system performs preliminary error detection and correction actions before row hammer attacks can cause uncorrectable damage. By continuously monitoring error patterns and proactively initiating targeted scrubbing operations on at-risk memory regions, the system prevents error accumulation that could lead to uncorrectable faults from row hammer attacks

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS12360847B2Adaptive internal error scrubbing and error handling
Publication Date: 2025.07.15 INTEL CORP
  • US12360847B2 patent drawing
  • US12360847B2 patent drawing
  • US12360847B2 patent drawing

AI summary

A memory subsystem with error checking and scrubbing (ECS) logic on-device on the memory can adapt the rate of ECS operations in response to detection of errors in the memory when the memory device is in automatic ECS mode. The ECS logic can include an indication of rows of memory that have been offlined by the host. The ECS logic can skip the offlined rows in ECS operation counts. The ECS logic can include requests or hints by the host to have ECS operations performed. An internal address generator of the ECS logic can select between generated addresses and the hints. The system can allow a memory controller to detect multibit errors (MBEs) related to a specific address of the associated memory. When the detected MBEs indicate a pattern of errors, the memory controller triggers a row hammer response for the specific address.