Adaptive Program Verify Scheme for Flash Memory Performance
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Solution Overview
Problem
Traditional programming operations in flash memory are inefficient due to the need for multiple loops and program verify operations, which can lead to increased time and potential read failures caused by degraded or defective memory cells, especially in multi-level cell memory where a single pulse program may not be sufficient.
Innovation Solution
A data storage device with a controller that determines which wordlines require one or more pulses for programming and stores this information in a map, allowing for adaptive programming operations, either with a single pulse and no verify or multiple pulses, and updates the map after Enhanced Post Write Read (EPWR) or XOR parity operations to optimize programming.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a single pulse program operation is used, then programming speed is improved, but reliability deteriorates due to read failures from degraded memory cells
Solution Approach 1:
The system performs preliminary classification of wordlines into different groups based on their programming characteristics before actual programming operations. This preliminary action allows the system to prepare appropriate programming strategies for different wordline types, enabling single-pulse programming for suitable wordlines while maintaining reliability through multi-loop programming for degraded wordlines.
Solution Approach 2:
The invention applies different programming strategies to different wordlines based on their individual characteristics. Wordlines are classified into multiple groups (e.g., SLC-pass, SLC-fail, MLC-pass) and each group receives tailored programming treatment. This local differentiation allows optimal programming speed for healthy wordlines while ensuring reliability for degraded ones.
2Reliability
If multiple loops with program verify operations are used, then reliability is improved, but programming time increases
Solution Approach 1:
The system implements local quality by applying verify operations selectively only to wordlines that require them based on their classification. SLC-pass wordlines that can be programmed with a single pulse skip the verify operation entirely, while SLC-fail and MLC-pass wordlines receive appropriate verify treatments. This selective approach maintains reliability where needed while minimizing time loss.
Solution Approach 2:
The classification of wordlines is performed in advance before programming operations begin. This preliminary action identifies which wordlines will need multi-loop programming with verify operations and which can use single-pulse programming without verify, allowing the system to optimize the overall programming time while ensuring reliability for problematic wordlines.
3Manufacturing precision
If program verify operations are performed for all wordlines, then manufacturing precision is improved, but device complexity increases
Solution Approach 1:
The invention reduces device complexity by implementing local quality - different verification procedures for different wordline groups. The controller uses classification information to determine which wordlines need verify operations and which don't, avoiding unnecessary verify operations on SLC-pass wordlines while maintaining verification accuracy for wordlines that require it.
Solution Approach 2:
The system performs preliminary classification of wordlines before programming, storing this information in a data structure. This preliminary action simplifies the control logic during actual programming operations, as the controller can directly reference the pre-computed classification to determine verify requirements, rather than implementing complex real-time verification logic for all wordlines.
4Reliability
If multi-loop programming is used for all wordlines, then reliability is improved, but productivity decreases
Solution Approach 1:
The system applies local quality by differentiating programming approaches for different wordline groups. SLC-pass wordlines use single-pulse programming without verify operations, maximizing productivity for these healthy wordlines. SLC-fail and MLC-pass wordlines use multi-loop programming with verify operations to ensure reliability. This differentiation maintains high overall productivity while ensuring reliability where needed.
Solution Approach 2:
The preliminary classification of wordlines into different groups enables the system to optimize productivity by applying the fastest possible programming method (single-pulse) to the majority of healthy wordlines while reserving multi-loop programming only for wordlines that actually need it. This preliminary sorting action is key to achieving high throughput without sacrificing reliability.
Data Source
AI summary
A data storage device includes a controller coupled to one or more memory devices. The controller is configured to determine one or more first wordlines within the memory device that needs more than one pulse for programming and one or more second wordlines within the memory device that needs one pulse and no program verify. The locations of the one or more first wordlines and the one or more second wordlines are stored in a data structure of the memory device. During program operations, the controller utilizes the data structure to determine whether the one or more wordlines being programmed requires only one pulse and no program verify or a multi-loop program. The data structure is updated after an EPWR and/or XOR parity operation.