Adaptive Programming Timing for Charge Trapping Memory Cells
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Solution Overview
Problem
Existing memory systems face inefficiencies in programming multiple memory cells in parallel due to uniform timing of programming pulses, leading to reduced read performance and increased program disturb, especially in NAND architectures where many cells are daisy-chained.
Innovation Solution
Implementing adaptive timing for individual programming pulses based on the relative numbers of program-enabled and program-inhibited memory cells, optimizing the RC constant of the word line to reduce charging and discharging times, and minimizing the time program-inhibited memory cells hold boosted voltages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If uniform timing is used for all programming pulses in parallel programming operations, then all memory cells are programmed simultaneously, but programming time is extended and program disturb increases
Solution Approach 1:
The patent applies dynamic timing adjustment by varying the duration of programming pulses based on the state of memory cells. Specifically, cells that have already been programmed to the desired state receive shorter or no further pulses, while cells that need programming receive full-duration pulses. This dynamic adaptation resolves the contradiction by preventing program disturb in completed cells while maintaining programming speed for cells that still need programming.
Solution Approach 2:
The patent implements local quality by applying different pulse timing characteristics to different groups of memory cells within the same programming operation. Cells are divided into subsets based on their programming status, and each subset receives customized pulse timing. This allows the system to optimize for both speed and reliability locally for each cell group rather than using a single uniform timing for all cells.
2Productivity
If programming pulses are applied to all memory cells in parallel, then programming throughput is improved, but read performance degrades due to uniform timing constraints
Solution Approach 1:
The patent uses dynamic timing adjustment where pulse durations are adapted based on real-time verification results. This allows the programming operation to proceed in phases, where early pulses can be longer to ensure programming, and later pulses can be shorter or skipped for cells that have already been programmed. This dynamic approach maintains high throughput while reducing the overall programming time that would otherwise degrade read performance.
Solution Approach 2:
The patent implements periodic verification and pulse application cycles. Instead of applying a single long programming pulse to all cells, the system applies pulses periodically interspersed with verification operations. This periodic action allows the system to maintain high throughput by keeping cells in a programming-ready state while minimizing the total time cells spend with boosted voltages, thereby preserving read performance.
3Manufacturing precision
If multiple programming sub-operations are used to program cells to different states, then programming precision is improved, but programming complexity increases
Solution Approach 1:
The patent segments the programming operation into multiple sub-operations, each targeting specific memory cell subsets and specific threshold voltage states. For example, one sub-operation may program cells to a first threshold state while another sub-operation programs different cells to a second threshold state. This segmentation improves precision by allowing customized pulse parameters for each sub-operation while managing complexity through systematic organization of the sub-operations.
Solution Approach 2:
The patent employs parameter changes by adjusting pulse voltage levels, durations, and timing based on the target state of each memory cell subset. Different threshold voltage states require different programming parameters, and the system dynamically changes these parameters between sub-operations. This approach achieves high programming precision while controlling complexity through systematic parameter management rather than arbitrary complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces overall programming time, minimizes program disturb, and enhances programming efficiency by dynamically adjusting pulse timing according to the changing proportions of enabled and inhibited cells, leading to improved performance and reduced errors.
Implementation Method 1
non-volatile memory cells each having a dielectric charge storage medium
Implementation Method 2
applying a series of programming pulses along the first word line
Data Source
AI summary
Techniques are presented for the programming of a non-volatile memory in which multi-state memory cells use a charge trapping layer. When writing data onto a word lines, different data states are written individually, while programming inhibiting the other states, thereby breaking down the write operation into a number of sub-operations, one for each state to be written. This allows for improved timing and decreased power consumption.