Adaptive Read Voltage Ordering for Memory Error Recovery
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Solution Overview
Problem
Existing memory systems face inefficiencies in read error recovery due to the fixed order of read threshold voltages, which does not adapt to changing memory cell conditions, leading to increased read latency and unnecessary retry operations.
Innovation Solution
A scheme that dynamically adjusts the order of read threshold voltages based on the success or failure of past operations, where successful voltages receive credits to prioritize higher-ordered positions in the retry table, reducing read latency and improving recovery efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a fixed order of read threshold voltages is used in read error recovery, then the system structure is simple, but read latency increases and recovery efficiency decreases
Solution Approach 1:
The patent applies dynamics by transforming the fixed read voltage order into a dynamic, adaptive structure. The read voltage application order is no longer static but changes based on real-time memory cell conditions and historical read results. The controller dynamically adjusts which read voltages are applied first in subsequent read operations, allowing the system to adapt to changing memory states and reduce read latency without increasing structural complexity.
Solution Approach 2:
The patent implements feedback mechanisms by using historical read results to inform future read voltage sequencing. The controller monitors read successes and failures, and this information feeds back into the decision-making process for ordering read voltages in subsequent operations. This feedback loop enables the system to learn from past performance and optimize the read voltage application order, thereby reducing read latency while maintaining simple system architecture.
2Device complexity
If a fixed order of read threshold voltages is used, then the control logic is simple, but unnecessary retry operations increase
Solution Approach 1:
The patent applies preliminary action by pre-establishing multiple possible read voltage orders and having the controller select from these pre-planned sequences based on current memory conditions. Rather than computing a completely new order in real-time, the system prepares multiple candidate sequences in advance and chooses the most appropriate one, reducing the need for unnecessary retries while keeping control logic manageable.
Solution Approach 2:
The patent uses feedback from previous read operations to determine which pre-planned read voltage order to apply next. By monitoring read successes and failures, the controller learns which voltage sequences are most effective under current conditions and prioritizes those sequences, thereby reducing unnecessary retry operations while maintaining relatively simple control logic through the use of pre-established patterns.
3Device complexity
If read voltages are applied in a fixed order, then the implementation is straightforward, but read error recovery performance deteriorates under varying memory conditions
Solution Approach 1:
The patent resolves this contradiction by making the read voltage application order dynamic rather than fixed. The system maintains simple implementation through standardized voltage sequences but adapts to varying memory conditions by selecting different sequences based on real-time feedback. This dynamic approach allows the same hardware implementation to handle diverse memory states effectively, improving adaptability without significantly increasing implementation complexity.
Solution Approach 2:
The patent applies parameter changes by varying the order parameter of read voltage application based on memory conditions. While the set of read voltages remains the same, their application order parameter changes dynamically to match current memory cell states. This allows the system to adapt to different memory conditions using the same hardware, improving versatility while keeping the implementation relatively straightforward through parameter adjustment rather than structural change.
Data Source
AI summary
Embodiments provide a scheme for determining the order of read threshold voltages used in a read error recovery operation for a memory system. A controller performs one or more read operations on a memory device using one or more read voltages among a plurality of read voltages in a set order. The controller detects a successful read operation among the one or more read operations. The controller determines one or more credits for the one or more read voltages, respectively, in response to the detected successful read operation. The controller updates the set order based on the determined credits.