Adaptive Soft-Programming Trims for NAND Flash Memory
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Solution Overview
Problem
NAND flash memory devices experience performance degradation due to the accumulation of trapped charge in floating gate memory cells, leading to uneven threshold voltage distribution and increased stress on the memory array, resulting in premature failure.
Innovation Solution
A modified soft-programming operation is implemented, where the number of pulses and parameters of the soft-programming signal are adjusted based on the count of erase pulses and external conditions, such as temperature, to achieve a more accurate and adaptive threshold voltage distribution among memory cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If soft-programming parameters are fixed during manufacturing, then device complexity is reduced, but performance degrades over time due to accumulated trapped charge
Solution Approach 1:
The soft-programming operation transitions from a static, fixed-parameter process to a dynamic, adaptive process. The control circuit now modifies soft-programming parameters (such as pulse width, pulse amplitude, or number of pulses) based on real-time detection of memory cell state, allowing the system to adapt to changing conditions over the device lifetime.
Solution Approach 2:
A feedback mechanism is introduced where the control circuit detects the actual state of memory cells after erase operations and uses this information to adjust soft-programming parameters. This closed-loop control ensures that the soft-programming operation remains optimal despite accumulation of trapped charge and changing device characteristics.
2Productivity
If erase operations are performed repeatedly, then data can be updated, but threshold voltage distribution becomes uneven and stress increases
Solution Approach 1:
The system dynamically changes soft-programming parameters based on the number of erase operations performed and the detected state of memory cells. As trapped charge accumulates and threshold voltage distribution deteriorates, the control circuit adjusts parameters such as increasing pulse width or modifying pulse amplitude to compensate for the degradation and maintain uniform threshold voltage distribution.
3Ease of operation
If fixed soft-programming parameters are used, then operation simplicity is maintained, but cross-coupling effects increase over time
Solution Approach 1:
The control circuit incorporates feedback to detect the state of memory cells and adjusts soft-programming parameters accordingly. This feedback mechanism allows the system to compensate for cross-coupling effects caused by trapped charge accumulation, maintaining operational simplicity while reducing harmful interactions between adjacent memory cells.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach ensures a more even threshold voltage distribution, reduces cross-coupling effects, and prolongs the lifespan of NAND flash memory devices by optimizing the soft-programming process in response to the changing state of memory cells over time.
Implementation Method 1
A soft-programming signal is applied to the memory cells. The soft-programming signal may be modified based on a count of erase pulses.
Implementation Method 2
Current then flows from the source line to the column bit line through each NAND string via the corresponding select gates
Implementation Method 3
A floating gate memory cell stores information by holding electrical charge within the floating gate. By adding or removing charge from the floating gate, the threshold voltage of the cell changes
Implementation Method 4
To erase the contents of the memory array, a relatively high voltage is applied to the memory array such that the source and drain of the memory cells to be erased are forward biased.
Data Source
AI summary
Systems and methods are disclosed for modifying soft-programming trims of a non-volatile memory device, such as a flash memory device. The soft-programming trims may be modified based on a count of erase pulses applied to memory cells of the memory device. The number of erase pulses used to erase memory cells may be indicative of accumulated charge in the memory cell. The start voltage, step size, pulse width, number of pulses, pulse ramp, ramp rate, or any other trim of the soft-programming operation may be modified in response to the number of erase pulses.