Adaptive Substrate for Opto-Electrical Interconnections

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Solution Overview

Problem

High RF interconnection and thermal dissipation in opto-electrical devices are hindered by the variability in heights of integrated circuits (ICs) and opto-electrical chips, making consistent substrate connection challenging due to manufacturing tolerances and inductance issues with wire bonds.

Innovation Solution

An opto-electrical device configuration using a substrate with adaptive thickness thermally conductive pads and a thermoelectric cooler (TEC) on a heatsink, allowing for flip-chip configuration and electrical connection with low inductance, while the adaptive pads compensate for height differences between ICs and TECs or chips, ensuring consistent assembly and thermal dissipation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If wire bonds are used to interconnect IC and opto-electrical chip, then electrical connection is achieved, but inductance increases and RF performance deteriorates

Engineering Contradiction:
Improveelectrical connection qualityVSAvoidinductance
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent extracts the harmful inductance by replacing wire bonds with a direct substrate-based interconnection. The substrate serves as the interconnection medium, eliminating the need for separate wire bonds and thereby removing the source of inductance that degrades RF performance above 90 GHz.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The substrate acts as an intermediary between the IC and opto-electrical chip, providing a low-inductance electrical connection path. Instead of using wire bonds as the intermediary, the substrate itself becomes the direct connection medium, enabling high-frequency signal transmission.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Ease of manufacture

If fixed thickness substrate is used for connection, then manufacturing is simplified, but height variability between ICs and chips causes assembly inconsistency

Engineering Contradiction:
Improvesubstrate fabricationVSAvoidassembly consistency
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent applies dynamics by making the substrate thickness variable rather than fixed. The adaptive thickness region allows the substrate to compensate for height differences between ICs and opto-electrical chips, enabling consistent assembly while maintaining manufacturing feasibility through a controlled gradient structure.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The substrate's thickness parameter is changed from a constant value to a variable value with an adaptive gradient. This parameter change enables the substrate to accommodate height variations in the stacked components, ensuring proper contact and assembly consistency without requiring precise height matching of individual components.

Inventive Principle:
Principle #35Parameter changes

3Device complexity

If uniform thermal conduction path is used, then thermal dissipation is simplified, but height differences between components reduce thermal contact efficiency

Engineering Contradiction:
Improvethermal management structureVSAvoidthermal dissipation efficiency
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent applies local quality by creating a region of variable thickness in the substrate specifically optimized for thermal conduction. This localized adaptive thickness region ensures optimal thermal contact between the IC and heatsink, improving thermal dissipation efficiency without complicating the overall thermal management structure.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent addresses thermal contact issues by introducing a dimensional variation in the substrate thickness along the vertical dimension. This dimensional change allows the substrate to conform to height differences between components, ensuring efficient thermal contact paths from the IC through the substrate to the heatsink.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Facilitates high RF performance above 90 GHz and effective thermal dissipation by ensuring consistent thicknesses and robust electrical connections, reducing inductance and variability, and enhancing durability through adaptable substrate design.

Implementation Method 1

a TEC and an opto-electrical chip disposed on the TEC

Methodology Applied
Scientific EffectThermoelectric cooling: Peltier Effect

Implementation Method 2

A heatsink is a passive heat exchanger that transfers heat generated by an electronic device to a fluid medium

Methodology Applied
Scientific EffectHeat exchange: Heat Exchanger

Implementation Method 3

transfers heat generated by an electronic device to a fluid medium

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Implementation Method 4

an adaptive thickness thermally conductive pad disposed on the thermally conductive element

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Data Source

PatentUS20230056968A1Substrate for facilitating one or more interconnections of an opto-electrical device
Publication Date: 2023.02.23 WELLS FARGO BANK NA
  • US20230056968A1 patent drawing
  • US20230056968A1 patent drawing
  • US20230056968A1 patent drawing

AI summary

In some implementations, an opto-electrical device includes a heatsink; a thermally conductive element disposed on a first region of a surface of the heatsink; an adaptive thickness thermally conductive pad disposed on the thermally conductive element; an integrated circuit (IC) disposed on the adaptive thickness thermally conductive pad; a thermoelectric cooler (TEC) disposed on a second region of the surface of the heatsink; an opto-electrical chip disposed on the TEC; and a substrate disposed on the IC and the opto-electrical chip, wherein the substrate is configured to electrically connect the IC and the opto-electrical chip.